Lines Matching refs:sp
53 str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
66 stp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
67 stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
68 stp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4]
113 ldp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
114 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
115 ldp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4]
119 ldr x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
136 str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
241 ldr x5, [sp, #CTX_EL3STATE_OFFSET + CTX_ESR_EL3]
249 stp x2, x3, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
257 stp x4, x5, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
269 mov x3, sp
273 ldr x5, [sp, #CTX_EL3STATE_OFFSET + CTX_RUNTIME_SP]
275 mov sp, x5
280 mov x28, sp
290 mov x27, sp
299 ldp x1, x2, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
304 ldp x3, x4, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
314 str xzr, [sp, #CTX_EL3STATE_OFFSET + CTX_ESR_EL3]