Lines Matching full:platform
18 include(`platform/intel/'PLATFORM`.m4')
21 ifelse(PLATFORM, `bxt', `define(NCORES, 1)')
22 ifelse(PLATFORM, `cnl', `define(NCORES, 4)')
23 ifelse(PLATFORM, `cml', `define(NCORES, 4)')
24 ifelse(PLATFORM, `icl', `define(NCORES, 4)')
25 ifelse(PLATFORM, `jsl', `define(NCORES, 2)')
26 ifelse(PLATFORM, `tgl', `define(NCORES, 4)')
27 ifelse(PLATFORM, `ehl', `define(NCORES, 4)')
28 ifelse(PLATFORM, `adl', `define(NCORES, 4)')
77 include(`platform/intel/intel-generic-dmic.m4')
79 ifelse(PLATFORM, `bxt',
158 ifelse(PLATFORM, `bxt', `',
215 ifelse(PLATFORM, `bxt',
238 ifelse(PLATFORM, `bxt',
249 ifelse(PLATFORM,`bxt',
257 ifelse(PLATFORM, `bxt', `define(ROOT_CLK, 19_2)')
258 ifelse(PLATFORM, `cnl', `define(ROOT_CLK, 24)')
259 ifelse(PLATFORM, `cml', `define(ROOT_CLK, 24)')
260 ifelse(PLATFORM, `icl', `define(ROOT_CLK, 38_4)')
261 ifelse(PLATFORM, `jsl', `define(ROOT_CLK, 38_4)')
262 ifelse(PLATFORM, `tgl', `define(ROOT_CLK, 38_4)')
263 ifelse(PLATFORM, `ehl', `define(ROOT_CLK, 38_4)')
264 ifelse(PLATFORM, `adl', `define(ROOT_CLK, 38_4)')