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72 point stores are aligned on an 8 byte boundary and the Altivec
73 stores are aligned on a 16 byte boundary. */
124 /* If __SPE__, then add 84 to the offset shown from this point on until
131 # one word pad to get floating point aligned on 8 byte boundary
135 on its own would be enough for GCC 4.1 and above, but older
147 /* If __powerpc64__, then add 96 to the offset shown from this point on until
265 point loades are aligned on an 8 byte boundary and the Altivec
266 loads are aligned on a 16 byte boundary. */
315 /* If __SPE__, then add 84 to the offset shown from this point on until
324 # one word pad to get floating point aligned on 8 byte boundary
328 __NO_FPRS__ on its own would be enough for GCC 4.1 and
338 /* If __powerpc64__, then add 96 to the offset shown from this point on until