Lines Matching refs:tmp3
43 #define tmp3 r21 macro
125 ldi -1,tmp3 /* load shift quantity. delay slot */
127 ldi -2,tmp3 /* load shift quantity. delay slot */
129 ldi -3,tmp3 /* load shift quantity. delay slot */
131 ldi 1,tmp3 /* load shift quantity. delay slot */
135 ldi -1,tmp3 /* load shift quantity. delay slot */
137 ldi -2,tmp3 /* load shift quantity. delay slot */
139 ldi 2,tmp3 /* load shift quantity. delay slot */
141 ldi 1,tmp3 /* load shift quantity. delay slot */
145 ldi -1,tmp3 /* load shift quantity. delay slot */
147 ldi 3,tmp3 /* load shift quantity. delay slot */
149 ldi 2,tmp3 /* load shift quantity. delay slot */
151 ldi 1,tmp3 /* load shift quantity. delay slot */
183 sh3add tmp3,r0,tmp4 /* compute shift amt */
191 vshd tmp1,tmp2,tmp3 /* position data ! */
192 uxor,nbz tmp3,r0,save
204 sh3add tmp3,r0,tmp4 /* compute shift amt */
216 vshd tmp1,tmp2,tmp3 /* position data ! */
220 or save, tmp3, tmp3
221 uxor,nbz tmp3,r0,save
232 vshd tmp1,tmp2,tmp3
236 stbys,b,m tmp3,4(0,d_addr) /* store ! */
240 vshd tmp2,tmp1,tmp3 /* position data ! */
242 stwm tmp3,4(d_addr)
246 vshd tmp1,tmp2,tmp3 /* delay slot */
247 uxor,nbz tmp3,r0,save
250 stbys,b,m tmp3,4(0,d_addr)
255 uxor,nbz tmp3,r0,save
257 stwm tmp3,4(d_addr)