Lines Matching +full:- +full:m
4 * \brief Multi-precision integer library
8 * SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
16 * . IA-32 (386+) . AMD64 / EM64T
17 * . IA-32 (SSE2) . Motorola 68000
18 * . PowerPC, 32-bit . MicroBlaze
19 * . PowerPC, 64-bit . TriCore
51 #else /* 64-bits */
71 /* *INDENT-OFF* */
74 /* armcc5 --gnu defines __GNUC__ but doesn't support GNU's extended asm */
86 * instead of using a fixed register, was implemented on x86/x86-64
95 * Disable use of the i386 assembly code below if option -O0, to disable all
98 * work with the -O0 option.
126 : "=m" (t), "=m" (c), "=m" (d), "=m" (s) \
127 : "m" (t), "m" (s), "m" (d), "m" (c), "m" (b) \
204 : "=m" (t), "=m" (c), "=m" (d), "=m" (s) \
205 : "m" (t), "m" (s), "m" (d), "m" (c), "m" (b) \
232 : "+c" (c), "+D" (d), "+S" (s), "+m" (*(uint64_t (*)[16]) d) \
233 : "b" (b), "m" (*(const uint64_t (*)[16]) s) \
239 // The following assembly code assumes that a pointer will fit in a 64-bit register
240 // (including ILP32 __aarch64__ ABIs such as on watchOS, hence the 2^32 - 1)
268 "+m" (*(uint64_t (*)[16]) d) \
269 : "r" (b), "m" (*(const uint64_t (*)[16]) s) \
298 : "=m" (c), "=m" (d), "=m" (s) \
299 : "m" (s), "m" (d), "m" (c), "m" (b) \
362 "addi r3, r3, -8 \n\t" \
363 "addi r4, r4, -8 \n\t" \
383 : "=m" (c), "=m" (d), "=m" (s) \
384 : "m" (s), "m" (d), "m" (c), "m" (b) \
397 "addi %%r3, %%r3, -8 \n\t" \
398 "addi %%r4, %%r4, -8 \n\t" \
418 : "=m" (c), "=m" (d), "=m" (s) \
419 : "m" (s), "m" (d), "m" (c), "m" (b) \
435 "addi r3, r3, -4 \n\t" \
436 "addi r4, r4, -4 \n\t" \
456 : "=m" (c), "=m" (d), "=m" (s) \
457 : "m" (s), "m" (d), "m" (c), "m" (b) \
469 "addi %%r3, %%r3, -4 \n\t" \
470 "addi %%r4, %%r4, -4 \n\t" \
490 : "=m" (c), "=m" (d), "=m" (s) \
491 : "m" (s), "m" (d), "m" (c), "m" (b) \
530 : "=m" (c), "=m" (d), "=m" (s) \
531 : "m" (s), "m" (d), "m" (c), "m" (b) \
562 : "=m" (c), "=m" (d), "=m" (s) \
563 : "m" (s), "m" (d), "m" (c), "m" (b) \
623 : "=m" (c), "=m" (d), "=m" (s) \
624 : "m" (s), "m" (d), "m" (c), "m" (b) \
654 : "=m" (c), "=m" (d), "=m" (s) \
655 : "m" (s), "m" (d), "m" (c), "m" (b) \
672 * Note, gcc -O0 by default uses r7 for the frame pointer, so it complains about
673 * our use of r7 below, unless -fomit-frame-pointer is passed.
675 * On the other hand, -fomit-frame-pointer is implied by any -Ox options with
745 : "=m" (c), "=m" (d), "=m" (s) \
746 : "m" (s), "m" (d), "m" (c), "m" (b) \
754 /* Armv6-M (or later) with DSP Instruction Set Extensions.
787 /* - Make sure loop is 4-byte aligned to avoid stalls
788 * upon repeated non-word aligned instructions in
790 * - Don't use ldm with post-increment or back-to-back
791 * loads with post-increment and same address register
793 * - Bunch loads and stores to reduce latency on some
794 * microarchitectures. E.g., on Cortex-M4, the first
796 * 2 cycles, while subsequent loads/stores are single-cycle. */
801 "ldr %[a1], [%[in], #-4] \n\t" \
802 "ldr %[b1], [%[acc], #-4] \n\t" \
805 "str %[b0], [%[acc], #-8] \n\t" \
806 "str %[b1], [%[acc], #-4] \n\t"
843 : "=m" (c), "=m" (d), "=m" (s) \
844 : "m" (s), "m" (d), "m" (c), "m" (b) \
881 : "=m" (c), "=m" (d), "=m" (s) \
882 : "m" (s), "m" (d), "m" (c), "m" (b) \
916 : "=m" (c), "=m" (d), "=m" (s) \
917 : "m" (s), "m" (d), "m" (c), "m" (b) \
1093 /* *INDENT-ON* */