Lines Matching refs:val
22 unsigned int val = 0; in hal_rpu_irq_enable() local
28 &val, in hal_rpu_irq_enable()
37 val |= (1 << RPU_REG_BIT_INT_FROM_RPU_CTRL); in hal_rpu_irq_enable()
41 val); in hal_rpu_irq_enable()
50 val = (1 << RPU_REG_BIT_INT_FROM_MCU_CTRL); in hal_rpu_irq_enable()
54 val); in hal_rpu_irq_enable()
70 unsigned int val = 0; in hal_rpu_irq_disable() local
73 &val, in hal_rpu_irq_disable()
82 val &= ~((unsigned int)(1 << RPU_REG_BIT_INT_FROM_RPU_CTRL)); in hal_rpu_irq_disable()
86 val); in hal_rpu_irq_disable()
94 val = ~((unsigned int)(1 << RPU_REG_BIT_INT_FROM_MCU_CTRL)); in hal_rpu_irq_disable()
98 val); in hal_rpu_irq_disable()
114 unsigned int val = 0; in hal_rpu_irq_ack() local
116 val = (1 << RPU_REG_BIT_INT_FROM_MCU_ACK); in hal_rpu_irq_ack()
120 val); in hal_rpu_irq_ack()
129 unsigned int val = 0; in hal_rpu_irq_wdog_chk() local
135 &val, in hal_rpu_irq_wdog_chk()
144 if (val != 0xAAAAAAAA) { in hal_rpu_irq_wdog_chk()
150 val); in hal_rpu_irq_wdog_chk()
156 val); in hal_rpu_irq_wdog_chk()
160 if (val & (1 << RPU_REG_BIT_MIPS_WATCHDOG_INT_STATUS)) { in hal_rpu_irq_wdog_chk()