Lines Matching refs:CONFIG

298 …frame_size = (NRF_UARTE_regs[inst].CONFIG & UARTE_CONFIG_FRAMESIZE_Msk) >> UARTE_CONFIG_FRAMESIZE_…  in nhw_uarte_get_frame_size()
315 uint32_t CONFIG = NRF_UARTE_regs[inst].CONFIG; in nhw_uarte_one_byte_time() local
319 if (CONFIG & UARTE_CONFIG_PARITY_Msk) { in nhw_uarte_one_byte_time()
322 if (CONFIG & UARTE_CONFIG_STOP_Msk) { /* Two stop bits */ in nhw_uarte_one_byte_time()
385 if ((NRF_UARTE_regs[inst].DMA.RX.MATCH.CONFIG & enable_mask) in nhw_UARTE_Rx_match_check()
391 … if (NRF_UARTE_regs[inst].DMA.RX.MATCH.CONFIG & (UARTE_DMA_RX_MATCH_CONFIG_ONESHOT0_Msk << i)) { in nhw_UARTE_Rx_match_check()
392 NRF_UARTE_regs[inst].DMA.RX.MATCH.CONFIG &= ~enable_mask; in nhw_UARTE_Rx_match_check()
423 return (NRF_UARTE_regs[inst].CONFIG & UARTE_CONFIG_HWFC_Msk) != 0; in flow_control_on()
476 if (NRF_UARTE_regs[inst].CONFIG & UARTE_CONFIG_ENDIAN_Msk) { //Cut from LSB in nhw_UARTE_process_Rx_byte()
727 NRF_UARTE_regs[inst].DMA.RX.MATCH.CONFIG |= UARTE_DMA_RX_MATCH_CONFIG_ENABLE0_Msk<<i; in nhw_UARTE_TASK_DMA_RX_ENABLEMATCH()
730 NRF_UARTE_regs[inst].DMA.RX.MATCH.CONFIG &= ~(UARTE_DMA_RX_MATCH_CONFIG_ENABLE0_Msk<<i); in nhw_UARTE_TASK_DMA_RX_DISABLEMATCH()
752 if (NRF_UARTE_regs[inst].CONFIG & UARTE_CONFIG_ENDIAN_Msk) { //Cut from LSB in nhw_UART_prep_Tx_data()
933 if (!(NRF_UARTE_regs[inst].CONFIG & UARTE_CONFIG_FRAMETIMEOUT_Msk)) { in nhw_uart_maybe_program_frametimeout()
1103 NRF_UARTE_regs[inst].CONFIG &= ~UARTE_CONFIG_FRAMESIZE_Msk; in nhw_UARTE_regw_sideeffects_CONFIG()
1104 NRF_UARTE_regs[inst].CONFIG |= frame_size << UARTE_CONFIG_FRAMESIZE_Pos; in nhw_UARTE_regw_sideeffects_CONFIG()