Lines Matching refs:SX1272Read
410 rnd |= ( ( uint32_t )SX1272Read( REG_LR_RSSIWIDEBAND ) & 0x01 ) << i; in SX1272Random()
465 ( SX1272Read( REG_PACKETCONFIG1 ) & in SX1272SetRxConfig()
470 …SX1272Write( REG_PACKETCONFIG2, ( SX1272Read( REG_PACKETCONFIG2 ) | RF_PACKETCONFIG2_DATAMODE_PACK… in SX1272SetRxConfig()
507 ( SX1272Read( REG_LR_MODEMCONFIG1 ) & in SX1272SetRxConfig()
518 ( SX1272Read( REG_LR_MODEMCONFIG2 ) & in SX1272SetRxConfig()
536 …SX1272Write( REG_LR_PLLHOP, ( SX1272Read( REG_LR_PLLHOP ) & RFLR_PLLHOP_FASTHOP_MASK ) | RFLR_PLLH… in SX1272SetRxConfig()
543 ( SX1272Read( REG_LR_DETECTOPTIMIZE ) & in SX1272SetRxConfig()
552 ( SX1272Read( REG_LR_DETECTOPTIMIZE ) & in SX1272SetRxConfig()
601 ( SX1272Read( REG_PACKETCONFIG1 ) & in SX1272SetTxConfig()
606 …SX1272Write( REG_PACKETCONFIG2, ( SX1272Read( REG_PACKETCONFIG2 ) | RF_PACKETCONFIG2_DATAMODE_PACK… in SX1272SetTxConfig()
643 …SX1272Write( REG_LR_PLLHOP, ( SX1272Read( REG_LR_PLLHOP ) & RFLR_PLLHOP_FASTHOP_MASK ) | RFLR_PLLH… in SX1272SetTxConfig()
648 ( SX1272Read( REG_LR_MODEMCONFIG1 ) & in SX1272SetTxConfig()
659 ( SX1272Read( REG_LR_MODEMCONFIG2 ) & in SX1272SetTxConfig()
670 ( SX1272Read( REG_LR_DETECTOPTIMIZE ) & in SX1272SetTxConfig()
679 ( SX1272Read( REG_LR_DETECTOPTIMIZE ) & in SX1272SetTxConfig()
758 …SX1272Write( REG_LR_INVERTIQ, ( ( SX1272Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INV… in SX1272Send()
763 …SX1272Write( REG_LR_INVERTIQ, ( ( SX1272Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INV… in SX1272Send()
777 if( ( SX1272Read( REG_OPMODE ) & ~RF_OPMODE_MASK ) == RF_OPMODE_SLEEP ) in SX1272Send()
833 … SX1272Write( REG_DIOMAPPING1, ( SX1272Read( REG_DIOMAPPING1 ) & RF_DIOMAPPING1_DIO0_MASK & in SX1272SetRx()
840 … SX1272Write( REG_DIOMAPPING2, ( SX1272Read( REG_DIOMAPPING2 ) & RF_DIOMAPPING2_DIO4_MASK & in SX1272SetRx()
845 SX1272.Settings.FskPacketHandler.FifoThresh = SX1272Read( REG_FIFOTHRESH ) & 0x3F; in SX1272SetRx()
859 …SX1272Write( REG_LR_INVERTIQ, ( ( SX1272Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INV… in SX1272SetRx()
864 …SX1272Write( REG_LR_INVERTIQ, ( ( SX1272Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INV… in SX1272SetRx()
882 …SX1272Write( REG_DIOMAPPING1, ( SX1272Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK & RFLR_… in SX1272SetRx()
896 …SX1272Write( REG_DIOMAPPING1, ( SX1272Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK ) | RFL… in SX1272SetRx()
950 … SX1272Write( REG_DIOMAPPING1, ( SX1272Read( REG_DIOMAPPING1 ) & RF_DIOMAPPING1_DIO0_MASK & in SX1272SetTx()
954 … SX1272Write( REG_DIOMAPPING2, ( SX1272Read( REG_DIOMAPPING2 ) & RF_DIOMAPPING2_DIO4_MASK & in SX1272SetTx()
956 SX1272.Settings.FskPacketHandler.FifoThresh = SX1272Read( REG_FIFOTHRESH ) & 0x3F; in SX1272SetTx()
973 …SX1272Write( REG_DIOMAPPING1, ( SX1272Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK & RFLR_… in SX1272SetTx()
987 …SX1272Write( REG_DIOMAPPING1, ( SX1272Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK ) | RFL… in SX1272SetTx()
1020 …SX1272Write( REG_DIOMAPPING1, ( SX1272Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO3_MASK ) | RFL… in SX1272StartCad()
1039 …SX1272Write( REG_PACKETCONFIG2, ( SX1272Read( REG_PACKETCONFIG2 ) & RF_PACKETCONFIG2_DATAMODE_MASK… in SX1272SetTxContinuousWave()
1058 rssi = -( SX1272Read( REG_RSSIVALUE ) >> 1 ); in SX1272ReadRssi()
1061 rssi = RSSI_OFFSET + SX1272Read( REG_LR_RSSIVALUE ); in SX1272ReadRssi()
1101 SX1272Write( REG_OPMODE, ( SX1272Read( REG_OPMODE ) & RF_OPMODE_MASK ) | opMode ); in SX1272SetOpMode()
1106 if( ( SX1272Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_ON ) != 0 ) in SX1272SetModem()
1126 …SX1272Write( REG_OPMODE, ( SX1272Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_MASK ) | RFLR_OPMO… in SX1272SetModem()
1133 …SX1272Write( REG_OPMODE, ( SX1272Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_MASK ) | RFLR_OPMO… in SX1272SetModem()
1146 uint8_t SX1272Read( uint32_t addr ) in SX1272Read() function
1406 … SX1272Write( REG_RXCONFIG, SX1272Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK ); in SX1272OnTimeoutIrq()
1472 irqFlags = SX1272Read( REG_IRQFLAGS2 ); in SX1272OnDio0Irq()
1491 … SX1272Write( REG_RXCONFIG, SX1272Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK ); in SX1272OnDio0Irq()
1515 SX1272.Settings.FskPacketHandler.Size = SX1272Read( REG_PAYLOADLENGTH ); in SX1272OnDio0Irq()
1536 … SX1272Write( REG_RXCONFIG, SX1272Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK ); in SX1272OnDio0Irq()
1553 irqFlags = SX1272Read( REG_LR_IRQFLAGS ); in SX1272OnDio0Irq()
1573 …SX1272.Settings.LoRaPacketHandler.SnrValue = ( ( ( int8_t )SX1272Read( REG_LR_PKTSNRVALUE ) ) + 2 … in SX1272OnDio0Irq()
1575 int16_t rssi = SX1272Read( REG_LR_PKTRSSIVALUE ); in SX1272OnDio0Irq()
1586 SX1272.Settings.LoRaPacketHandler.Size = SX1272Read( REG_LR_RXNBBYTES ); in SX1272OnDio0Irq()
1587 SX1272Write( REG_LR_FIFOADDRPTR, SX1272Read( REG_LR_FIFORXCURRENTADDR ) ); in SX1272OnDio0Irq()
1661 SX1272.Settings.FskPacketHandler.Size = SX1272Read( REG_PAYLOADLENGTH ); in SX1272OnDio1Irq()
1768 … SX1272.Settings.FskPacketHandler.RssiValue = -( SX1272Read( REG_RSSIVALUE ) >> 1 ); in SX1272OnDio2Irq()
1770 …er.AfcValue = ( int32_t )SX1272ConvertPllStepToFreqInHz( ( ( uint16_t )SX1272Read( REG_AFCMSB ) <<… in SX1272OnDio2Irq()
1771 … ( uint16_t )SX1272Read( REG_AFCLSB ) ); in SX1272OnDio2Irq()
1772 SX1272.Settings.FskPacketHandler.RxGain = ( SX1272Read( REG_LNA ) >> 5 ) & 0x07; in SX1272OnDio2Irq()
1783 …RadioEvents->FhssChangeChannel( ( SX1272Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK )… in SX1272OnDio2Irq()
1804 …RadioEvents->FhssChangeChannel( ( SX1272Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK )… in SX1272OnDio2Irq()
1824 … if( ( SX1272Read( REG_LR_IRQFLAGS ) & RFLR_IRQFLAGS_CADDETECTED ) == RFLR_IRQFLAGS_CADDETECTED ) in SX1272OnDio3Irq()