Lines Matching refs:result
82 uint32_t result; in __get_CONTROL() local
84 __ASM volatile ("MRS %0, control" : "=r" (result) ); in __get_CONTROL()
85 return(result); in __get_CONTROL()
107 uint32_t result; in __get_IPSR() local
109 __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); in __get_IPSR()
110 return(result); in __get_IPSR()
121 uint32_t result; in __get_APSR() local
123 __ASM volatile ("MRS %0, apsr" : "=r" (result) ); in __get_APSR()
124 return(result); in __get_APSR()
136 uint32_t result; in __get_xPSR() local
138 __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); in __get_xPSR()
139 return(result); in __get_xPSR()
150 register uint32_t result; in __get_PSP() local
152 __ASM volatile ("MRS %0, psp\n" : "=r" (result) ); in __get_PSP()
153 return(result); in __get_PSP()
175 register uint32_t result; in __get_MSP() local
177 __ASM volatile ("MRS %0, msp\n" : "=r" (result) ); in __get_MSP()
178 return(result); in __get_MSP()
201 uint32_t result; in __get_PRIMASK() local
203 __ASM volatile ("MRS %0, primask" : "=r" (result) ); in __get_PRIMASK()
204 return(result); in __get_PRIMASK()
250 uint32_t result; in __get_BASEPRI() local
252 __ASM volatile ("MRS %0, basepri" : "=r" (result) ); in __get_BASEPRI()
253 return(result); in __get_BASEPRI()
287 uint32_t result; in __get_FAULTMASK() local
289 __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); in __get_FAULTMASK()
290 return(result); in __get_FAULTMASK()
317 uint32_t result; in __get_FPSCR() local
321 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); in __get_FPSCR()
323 return(result); in __get_FPSCR()
455 uint32_t result; in __REV()
457 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); in __REV()
458 return(result); in __REV()
471 uint32_t result; in __REV16() local
473 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); in __REV16()
474 return(result); in __REV16()
489 int32_t result; in __REVSH()
491 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); in __REVSH()
492 return(result); in __REVSH()
528 uint32_t result; in __RBIT() local
531 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); in __RBIT()
535 result = value; /* r will be reversed bits of v; first get LSB of v */ in __RBIT()
538 result <<= 1U; in __RBIT()
539 result |= value & 1U; in __RBIT()
542 result <<= s; /* shift when v's highest bits are zero */ in __RBIT()
544 return(result); in __RBIT()
567 uint32_t result; in __LDREXB() local
570 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); in __LDREXB()
575 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); in __LDREXB()
577 return ((uint8_t) result); /* Add explicit type cast here */ in __LDREXB()
589 uint32_t result; in __LDREXH() local
592 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); in __LDREXH()
597 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); in __LDREXH()
599 return ((uint16_t) result); /* Add explicit type cast here */ in __LDREXH()
611 uint32_t result; in __LDREXW() local
613 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); in __LDREXW()
614 return(result); in __LDREXW()
628 uint32_t result; in __STREXB() local
630 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); in __STREXB()
631 return(result); in __STREXB()
645 uint32_t result; in __STREXH() local
647 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); in __STREXH()
648 return(result); in __STREXH()
662 uint32_t result; in __STREXW() local
664 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); in __STREXW()
665 return(result); in __STREXW()
718 uint32_t result; in __RRX() local
720 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); in __RRX()
721 return(result); in __RRX()
733 uint32_t result; in __LDRBT() local
736 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) ); in __LDRBT()
741 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); in __LDRBT()
743 return ((uint8_t) result); /* Add explicit type cast here */ in __LDRBT()
755 uint32_t result; in __LDRHT() local
758 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) ); in __LDRHT()
763 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); in __LDRHT()
765 return ((uint16_t) result); /* Add explicit type cast here */ in __LDRHT()
777 uint32_t result; in __LDRT() local
779 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) ); in __LDRT()
780 return(result); in __LDRT()
834 uint32_t result; in __SADD8() local
836 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SADD8()
837 return(result); in __SADD8()
842 uint32_t result; in __QADD8() local
844 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QADD8()
845 return(result); in __QADD8()
850 uint32_t result; in __SHADD8() local
852 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SHADD8()
853 return(result); in __SHADD8()
858 uint32_t result; in __UADD8() local
860 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UADD8()
861 return(result); in __UADD8()
866 uint32_t result; in __UQADD8() local
868 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UQADD8()
869 return(result); in __UQADD8()
874 uint32_t result; in __UHADD8() local
876 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UHADD8()
877 return(result); in __UHADD8()
883 uint32_t result; in __SSUB8() local
885 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SSUB8()
886 return(result); in __SSUB8()
891 uint32_t result; in __QSUB8() local
893 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QSUB8()
894 return(result); in __QSUB8()
899 uint32_t result; in __SHSUB8() local
901 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SHSUB8()
902 return(result); in __SHSUB8()
907 uint32_t result; in __USUB8() local
909 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __USUB8()
910 return(result); in __USUB8()
915 uint32_t result; in __UQSUB8() local
917 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UQSUB8()
918 return(result); in __UQSUB8()
923 uint32_t result; in __UHSUB8() local
925 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UHSUB8()
926 return(result); in __UHSUB8()
932 uint32_t result; in __SADD16() local
934 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SADD16()
935 return(result); in __SADD16()
940 uint32_t result; in __QADD16() local
942 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QADD16()
943 return(result); in __QADD16()
948 uint32_t result; in __SHADD16() local
950 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SHADD16()
951 return(result); in __SHADD16()
956 uint32_t result; in __UADD16() local
958 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UADD16()
959 return(result); in __UADD16()
964 uint32_t result; in __UQADD16() local
966 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UQADD16()
967 return(result); in __UQADD16()
972 uint32_t result; in __UHADD16() local
974 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UHADD16()
975 return(result); in __UHADD16()
980 uint32_t result; in __SSUB16() local
982 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SSUB16()
983 return(result); in __SSUB16()
988 uint32_t result; in __QSUB16() local
990 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QSUB16()
991 return(result); in __QSUB16()
996 uint32_t result; in __SHSUB16() local
998 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SHSUB16()
999 return(result); in __SHSUB16()
1004 uint32_t result; in __USUB16() local
1006 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __USUB16()
1007 return(result); in __USUB16()
1012 uint32_t result; in __UQSUB16() local
1014 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UQSUB16()
1015 return(result); in __UQSUB16()
1020 uint32_t result; in __UHSUB16() local
1022 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UHSUB16()
1023 return(result); in __UHSUB16()
1028 uint32_t result; in __SASX() local
1030 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SASX()
1031 return(result); in __SASX()
1036 uint32_t result; in __QASX() local
1038 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QASX()
1039 return(result); in __QASX()
1044 uint32_t result; in __SHASX() local
1046 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SHASX()
1047 return(result); in __SHASX()
1052 uint32_t result; in __UASX() local
1054 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UASX()
1055 return(result); in __UASX()
1060 uint32_t result; in __UQASX() local
1062 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UQASX()
1063 return(result); in __UQASX()
1068 uint32_t result; in __UHASX() local
1070 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UHASX()
1071 return(result); in __UHASX()
1076 uint32_t result; in __SSAX() local
1078 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SSAX()
1079 return(result); in __SSAX()
1084 uint32_t result; in __QSAX() local
1086 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QSAX()
1087 return(result); in __QSAX()
1092 uint32_t result; in __SHSAX() local
1094 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SHSAX()
1095 return(result); in __SHSAX()
1100 uint32_t result; in __USAX() local
1102 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __USAX()
1103 return(result); in __USAX()
1108 uint32_t result; in __UQSAX() local
1110 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UQSAX()
1111 return(result); in __UQSAX()
1116 uint32_t result; in __UHSAX() local
1118 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UHSAX()
1119 return(result); in __UHSAX()
1124 uint32_t result; in __USAD8() local
1126 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __USAD8()
1127 return(result); in __USAD8()
1132 uint32_t result; in __USADA8() local
1134 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); in __USADA8()
1135 return(result); in __USADA8()
1154 uint32_t result; in __UXTB16() local
1156 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); in __UXTB16()
1157 return(result); in __UXTB16()
1162 uint32_t result; in __UXTAB16() local
1164 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __UXTAB16()
1165 return(result); in __UXTAB16()
1170 uint32_t result; in __SXTB16() local
1172 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); in __SXTB16()
1173 return(result); in __SXTB16()
1178 uint32_t result; in __SXTAB16() local
1180 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SXTAB16()
1181 return(result); in __SXTAB16()
1186 uint32_t result; in __SMUAD() local
1188 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SMUAD()
1189 return(result); in __SMUAD()
1194 uint32_t result; in __SMUADX() local
1196 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SMUADX()
1197 return(result); in __SMUADX()
1202 uint32_t result; in __SMLAD() local
1204 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); in __SMLAD()
1205 return(result); in __SMLAD()
1210 uint32_t result; in __SMLADX() local
1212 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); in __SMLADX()
1213 return(result); in __SMLADX()
1252 uint32_t result; in __SMUSD() local
1254 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SMUSD()
1255 return(result); in __SMUSD()
1260 uint32_t result; in __SMUSDX() local
1262 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SMUSDX()
1263 return(result); in __SMUSDX()
1268 uint32_t result; in __SMLSD() local
1270 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); in __SMLSD()
1271 return(result); in __SMLSD()
1276 uint32_t result; in __SMLSDX() local
1278 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); in __SMLSDX()
1279 return(result); in __SMLSDX()
1318 uint32_t result; in __SEL() local
1320 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SEL()
1321 return(result); in __SEL()
1326 int32_t result; in __QADD() local
1328 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QADD()
1329 return(result); in __QADD()
1334 int32_t result; in __QSUB() local
1336 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QSUB()
1337 return(result); in __QSUB()
1359 int32_t result; in __SMMLA() local
1361 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); in __SMMLA()
1362 return(result); in __SMMLA()