Lines Matching refs:x

515 #define XTHAL_AMB_BUFFERABLE	x	/* 000 B BU --s: BUfferable       ?
517 #define XTHAL_AMB_ORDERED x /* 000 O OR fls: ORdered G *
519 #define XTHAL_AMB_FUSEWRITES x /* 000 F FW --s: FuseWrites none
523 #define XTHAL_AMB_TRUSTED x /* 000 T TR ?l?: TRusted none
526 #define XTHAL_AMB_PREFETCH x /* 000 P PR fl?: PRefetch none
528 #define XTHAL_AMB_STREAM x /* 000 S ST ???: STreaming none
1134 #define XTHAL_ENCODE_MEMORY_TYPE(x) \ argument
1135 (((x) & 0xffffe000) ? \
1136 (_XTHAL_MEM_IS_DEVICE((x)) ? _XTHAL_ENCODE_DEVICE((x)) : \
1137 (_XTHAL_IS_SYSTEM_NONCACHEABLE((x)) ? \
1138 _XTHAL_ENCODE_SYSTEM_NONCACHEABLE((x)) : \
1139 _XTHAL_ENCODE_SYSTEM_CACHEABLE((x)))) : (x))
1177 #define XTHAL_MPU_ENTRY_GET_VSTARTADDR(x) ((x).as & 0xffffffe0) argument
1179 #define XTHAL_MPU_ENTRY_SET_VSTARTADDR(x, vaddr) (x).as = \ argument
1180 (((x).as) & 0x1) | ((vaddr) & 0xffffffe0)
1182 #define XTHAL_MPU_ENTRY_GET_VALID(x) (((x).as & 0x1)) argument
1184 #define XTHAL_MPU_ENTRY_SET_VALID(x, valid) (x).as = \ argument
1185 (((x).as & 0xfffffffe) | ((valid) & 0x1))
1186 #define XTHAL_MPU_ENTRY_GET_ACCESS(x) ((((x).at) >> 8) & 0xf) argument
1188 #define XTHAL_MPU_ENTRY_SET_ACCESS(x, accessRights) ((x).at = \ argument
1189 ((x).at & 0xfffff0ff) | (((accessRights) & 0xf) << 8))
1191 #define XTHAL_MPU_ENTRY_GET_MEMORY_TYPE(x) ((((x).at) >> 12) & 0x1ff) argument
1193 #define XTHAL_MPU_ENTRY_SET_MEMORY_TYPE(x, memtype) ((x).at = \ argument
1194 ((x).at & 0xffe00fff) | (((XTHAL_ENCODE_MEMORY_TYPE(memtype)) & 0x1ff) << 12))
1221 extern int xthal_encode_memory_type(unsigned int x);
1388 #define _XTHAL_MEM_ANY_SHAREABLE(x) (((x) & XTHAL_MEM_SYSTEM_SHAREABLE) ? 1 : 0) argument
1390 #define _XTHAL_MEM_INNER_SHAREABLE(x) ((((x) & XTHAL_MEM_SYSTEM_SHAREABLE) \ argument
1393 #define _XTHAL_MEM_IS_BUFFERABLE(x) (((x) & XTHAL_MEM_BUFFERABLE) ? 1 : 0) argument
1395 #define _XTHAL_MEM_IS_DEVICE(x) (((x) & XTHAL_MEM_DEVICE) ? 1 : 0) argument
1397 #define _XTHAL_NON_CACHEABLE_DOMAIN(x) \ argument
1398 (_XTHAL_MEM_IS_DEVICE(x) || _XTHAL_MEM_ANY_SHAREABLE(x)? 0x3 : 0)
1400 #define _XTHAL_CACHEABLE_DOMAIN(x) (_XTHAL_MEM_ANY_SHAREABLE(x) ? \ argument
1403 #define _XTHAL_MEM_CACHE_MASK(x) ((x) & _XTHAL_SYSTEM_CACHE_BITS) argument
1405 #define _XTHAL_IS_SYSTEM_NONCACHEABLE(x) \ argument
1406 (((_XTHAL_MEM_CACHE_MASK(x) & XTHAL_MEM_NON_CACHEABLE) == \
1409 #define _XTHAL_ENCODE_DEVICE(x) \ argument
1410 (((((x) & XTHAL_MEM_INTERRUPTIBLE) ? 1 : 0) << 3) | \
1411 (_XTHAL_NON_CACHEABLE_DOMAIN(x) << 1) | _XTHAL_MEM_IS_BUFFERABLE(x))
1413 #define _XTHAL_ENCODE_SYSTEM_NONCACHEABLE(x) \ argument
1414 (0x18 | (_XTHAL_NON_CACHEABLE_DOMAIN(x) << 1) \
1415 | _XTHAL_MEM_IS_BUFFERABLE(x))
1417 #define _XTHAL_ENCODE_SYSTEM_CACHEABLE(x) \ argument
1418 (((((((x) & _XTHAL_LOCAL_CACHE_BITS) >> 4) & XTHAL_MEM_NON_CACHEABLE) == \
1420 (_XTHAL_CACHEABLE_DOMAIN(x) << 4) : \
1421 _XTHAL_ENCODE_SYSTEM_CACHEABLE_LOCAL_CACHEABLE(x)) | \
1422 ((_XTHAL_MEM_INNER_SHAREABLE(x) << 3) | \
1423 (_XTHAL_MEM_CACHE_MASK(x) & _XTHAL_MEM_SYSTEM_RWC_MASK) \
1426 #define _XTHAL_ENCODE_SYSTEM_CACHEABLE_LOCAL_CACHEABLE(x) \ argument
1427 ((_XTHAL_CACHEABLE_DOMAIN(x) << 7) | (((((x) & _XTHAL_LOCAL_CACHE_BITS) ? \
1428 ((x) & _XTHAL_LOCAL_CACHE_BITS) : \
1429 (_XTHAL_MEM_CACHE_MASK(x) << 4)) \