131     SPICC32XXDMA_HWAttrsV1 const *hwAttrs, SPI_Transaction *transaction)  in configDMA()  argument
177         *hwAttrs->scratchBufPtr = hwAttrs->defaultTxBufValue;  in configDMA()
178         buf = hwAttrs->scratchBufPtr;  in configDMA()
182     MAP_uDMAChannelControlSet(hwAttrs->txChannelIndex | UDMA_PRI_SELECT,  in configDMA()
184     MAP_uDMAChannelAttributeDisable(hwAttrs->txChannelIndex,  in configDMA()
186     MAP_uDMAChannelTransferSet(hwAttrs->txChannelIndex | UDMA_PRI_SELECT,  in configDMA()
187         UDMA_MODE_BASIC, buf, (void *) (hwAttrs->baseAddr + MCSPI_O_TX0),  in configDMA()
202         buf = hwAttrs->scratchBufPtr;  in configDMA()
206     MAP_uDMAChannelControlSet(hwAttrs->rxChannelIndex | UDMA_PRI_SELECT,  in configDMA()
208     MAP_uDMAChannelAttributeDisable(hwAttrs->rxChannelIndex,  in configDMA()
210     MAP_uDMAChannelTransferSet(hwAttrs->rxChannelIndex | UDMA_PRI_SELECT,  in configDMA()
211         UDMA_MODE_BASIC, (void *) (hwAttrs->baseAddr + MCSPI_O_RX0), buf,  in configDMA()
230     MAP_uDMAChannelAssign(hwAttrs->rxChannelIndex);  in configDMA()
231     MAP_uDMAChannelAssign(hwAttrs->txChannelIndex);  in configDMA()
234     MAP_SPIDmaEnable(hwAttrs->baseAddr, SPI_RX_DMA | SPI_TX_DMA);  in configDMA()
235     MAP_SPIIntClear(hwAttrs->baseAddr, SPI_INT_DMARX);  in configDMA()
236     MAP_SPIIntEnable(hwAttrs->baseAddr, SPI_INT_DMARX);  in configDMA()
237     MAP_SPIWordCountSet(hwAttrs->baseAddr, object->currentXferAmt);  in configDMA()
240     MAP_uDMAChannelEnable(hwAttrs->txChannelIndex);  in configDMA()
241     MAP_uDMAChannelEnable(hwAttrs->rxChannelIndex);  in configDMA()
245     MAP_SPIEnable(hwAttrs->baseAddr);  in configDMA()
246     MAP_SPICSEnable(hwAttrs->baseAddr);  in configDMA()
252 static inline uint32_t getDmaRemainingXfers(SPICC32XXDMA_HWAttrsV1 const *hwAttrs) {  in getDmaRemainingXfers()  argument
257     controlWord = controlTable[(hwAttrs->rxChannelIndex & 0x3f)].ulControl;  in getDmaRemainingXfers()
281     SPICC32XXDMA_HWAttrsV1 const *hwAttrs)  in initHw()  argument
288     MAP_SPICSDisable(hwAttrs->baseAddr);  in initHw()
289     MAP_SPIDisable(hwAttrs->baseAddr);  in initHw()
290     MAP_SPIReset(hwAttrs->baseAddr);  in initHw()
292     MAP_SPIConfigSetExpClk(hwAttrs->baseAddr,  in initHw()
293         MAP_PRCMPeripheralClockGet(hwAttrs->spiPRCM), object->bitRate,  in initHw()
295         (hwAttrs->csControl | hwAttrs->pinMode | hwAttrs->turboMode |  in initHw()
296         hwAttrs->csPolarity | ((object->dataSize - 1) << 7)));  in initHw()
298     MAP_SPIFIFOEnable(hwAttrs->baseAddr, SPI_RX_FIFO | SPI_TX_FIFO);  in initHw()
299     MAP_SPIFIFOLevelSet(hwAttrs->baseAddr, object->txFifoTrigger,  in initHw()
310     SPICC32XXDMA_HWAttrsV1 const *hwAttrs = ((SPI_Handle) clientArg)->hwAttrs;  in postNotifyFxn()  local
312     initHw(object, hwAttrs);  in postNotifyFxn()
325     SPICC32XXDMA_HWAttrsV1 const *hwAttrs = ((SPI_Handle)arg)->hwAttrs;  in spiHwiFxn()  local
332     intFlags = MAP_SPIIntStatus(hwAttrs->baseAddr, false);  in spiHwiFxn()
334         MAP_SPIIntDisable(hwAttrs->baseAddr, SPI_INT_DMATX);  in spiHwiFxn()
335         MAP_SPIIntClear(hwAttrs->baseAddr, SPI_INT_DMATX);  in spiHwiFxn()
338     if (MAP_uDMAChannelIsEnabled(hwAttrs->rxChannelIndex)) {  in spiHwiFxn()
344     MAP_SPIDmaDisable(hwAttrs->baseAddr, SPI_RX_DMA | SPI_TX_DMA);  in spiHwiFxn()
345     MAP_SPIIntDisable(hwAttrs->baseAddr, SPI_INT_DMARX);  in spiHwiFxn()
346     MAP_SPIIntClear(hwAttrs->baseAddr, SPI_INT_DMARX);  in spiHwiFxn()
347     MAP_SPICSDisable(hwAttrs->baseAddr);  in spiHwiFxn()
348     MAP_SPIDisable(hwAttrs->baseAddr);  in spiHwiFxn()
355         configDMA(object, hwAttrs, object->transaction);  in spiHwiFxn()
381     SPICC32XXDMA_HWAttrsV1 const *hwAttrs, SPI_Transaction *transaction)  in spiPollingTransfer()  argument
393         rxBuf = hwAttrs->scratchBufPtr;  in spiPollingTransfer()
400         *hwAttrs->scratchBufPtr = hwAttrs->defaultTxBufValue;  in spiPollingTransfer()
401         txBuf = hwAttrs->scratchBufPtr;  in spiPollingTransfer()
421     MAP_SPIWordCountSet(hwAttrs->baseAddr, 0);  in spiPollingTransfer()
422     MAP_SPIEnable(hwAttrs->baseAddr);  in spiPollingTransfer()
423     MAP_SPICSEnable(hwAttrs->baseAddr);  in spiPollingTransfer()
427             MAP_SPIDataPut(hwAttrs->baseAddr, *((uint8_t *) txBuf));  in spiPollingTransfer()
428             MAP_SPIDataGet(hwAttrs->baseAddr, (unsigned long *)&dummyBuffer);  in spiPollingTransfer()
432             MAP_SPIDataPut(hwAttrs->baseAddr, *((uint16_t *) txBuf));  in spiPollingTransfer()
433             MAP_SPIDataGet(hwAttrs->baseAddr, (unsigned long *) &dummyBuffer);  in spiPollingTransfer()
437             MAP_SPIDataPut(hwAttrs->baseAddr, *((uint32_t *) txBuf));  in spiPollingTransfer()
438             MAP_SPIDataGet(hwAttrs->baseAddr, (unsigned long * ) rxBuf);  in spiPollingTransfer()
450     MAP_SPICSDisable(hwAttrs->baseAddr);  in spiPollingTransfer()
451     MAP_SPIDisable(hwAttrs->baseAddr);  in spiPollingTransfer()
461     SPICC32XXDMA_HWAttrsV1 const *hwAttrs = handle->hwAttrs;  in SPICC32XXDMA_close()  local
463     MAP_SPICSDisable(hwAttrs->baseAddr);  in SPICC32XXDMA_close()
464     MAP_SPIDisable(hwAttrs->baseAddr);  in SPICC32XXDMA_close()
465     MAP_SPIFIFODisable(hwAttrs->baseAddr, SPI_RX_FIFO | SPI_TX_FIFO);  in SPICC32XXDMA_close()
468     Power_releaseDependency(getPowerMgrId(hwAttrs->baseAddr));  in SPICC32XXDMA_close()
486     if (hwAttrs->mosiPin != SPICC32XXDMA_PIN_NO_CONFIG) {  in SPICC32XXDMA_close()
487         padRegister = (PinToPadGet((hwAttrs->mosiPin) & 0xff)<<2)  in SPICC32XXDMA_close()
491     if (hwAttrs->misoPin != SPICC32XXDMA_PIN_NO_CONFIG) {  in SPICC32XXDMA_close()
492         padRegister = (PinToPadGet((hwAttrs->misoPin) & 0xff)<<2)  in SPICC32XXDMA_close()
496     if (hwAttrs->clkPin != SPICC32XXDMA_PIN_NO_CONFIG) {  in SPICC32XXDMA_close()
497         padRegister = (PinToPadGet((hwAttrs->clkPin) & 0xff)<<2)  in SPICC32XXDMA_close()
501     if ((hwAttrs->pinMode == SPI_4PIN_MODE) &&  in SPICC32XXDMA_close()
502         (hwAttrs->csPin != SPICC32XXDMA_PIN_NO_CONFIG)) {  in SPICC32XXDMA_close()
503         padRegister = (PinToPadGet((hwAttrs->csPin) & 0xff)<<2)  in SPICC32XXDMA_close()
538     SPICC32XXDMA_HWAttrsV1 const *hwAttrs = handle->hwAttrs;  in SPICC32XXDMA_open()  local
559     powerMgrId = getPowerMgrId(hwAttrs->baseAddr);  in SPICC32XXDMA_open()
570     if (hwAttrs->mosiPin != SPICC32XXDMA_PIN_NO_CONFIG) {  in SPICC32XXDMA_open()
571         pin = (hwAttrs->mosiPin) & 0xff;  in SPICC32XXDMA_open()
572         mode = (hwAttrs->mosiPin >> 8) & 0xff;  in SPICC32XXDMA_open()
576     if (hwAttrs->misoPin != SPICC32XXDMA_PIN_NO_CONFIG) {  in SPICC32XXDMA_open()
577         pin = (hwAttrs->misoPin) & 0xff;  in SPICC32XXDMA_open()
578         mode = (hwAttrs->misoPin >> 8) & 0xff;  in SPICC32XXDMA_open()
582     if (hwAttrs->clkPin != SPICC32XXDMA_PIN_NO_CONFIG) {  in SPICC32XXDMA_open()
583         pin = (hwAttrs->clkPin) & 0xff;  in SPICC32XXDMA_open()
584         mode = (hwAttrs->clkPin >> 8) & 0xff;  in SPICC32XXDMA_open()
588     if (hwAttrs->pinMode == SPI_4PIN_MODE) {  in SPICC32XXDMA_open()
589         if (hwAttrs->csPin != SPICC32XXDMA_PIN_NO_CONFIG) {  in SPICC32XXDMA_open()
590             pin = (hwAttrs->csPin) & 0xff;  in SPICC32XXDMA_open()
591             mode = (hwAttrs->csPin >> 8) & 0xff;  in SPICC32XXDMA_open()
605     hwiParams.priority = hwAttrs->intPriority;  in SPICC32XXDMA_open()
606     object->hwiHandle = HwiP_create(hwAttrs->intNum, spiHwiFxn, &hwiParams);  in SPICC32XXDMA_open()
659     initHw(object, hwAttrs);  in SPICC32XXDMA_open()
673     SPICC32XXDMA_HWAttrsV1 const *hwAttrs = handle->hwAttrs;  in SPICC32XXDMA_transfer()  local
677         (hwAttrs->scratchBufPtr == NULL && (transaction->rxBuf == NULL ||  in SPICC32XXDMA_transfer()
711         transaction->count < hwAttrs->minDmaTransferSize) || !buffersAligned) {  in SPICC32XXDMA_transfer()
712         spiPollingTransfer(object, hwAttrs, transaction);  in SPICC32XXDMA_transfer()
722         configDMA(object, hwAttrs, transaction);  in SPICC32XXDMA_transfer()
753     SPICC32XXDMA_HWAttrsV1 const *hwAttrs = handle->hwAttrs;  in SPICC32XXDMA_transferCancel()  local
773         HwiP_disableInterrupt(hwAttrs->intNum);  in SPICC32XXDMA_transferCancel()
774         HwiP_clearInterrupt(hwAttrs->intNum);  in SPICC32XXDMA_transferCancel()
777         MAP_uDMAChannelDisable(hwAttrs->rxChannelIndex);  in SPICC32XXDMA_transferCancel()
778         MAP_uDMAChannelDisable(hwAttrs->txChannelIndex);  in SPICC32XXDMA_transferCancel()
780         MAP_SPIIntDisable(hwAttrs->baseAddr, SPI_INT_DMARX);  in SPICC32XXDMA_transferCancel()
781         MAP_SPIIntClear(hwAttrs->baseAddr, SPI_INT_DMARX);  in SPICC32XXDMA_transferCancel()
782         MAP_SPIDmaDisable(hwAttrs->baseAddr, SPI_RX_DMA | SPI_TX_DMA);  in SPICC32XXDMA_transferCancel()
790         initHw(object, hwAttrs);  in SPICC32XXDMA_transferCancel()
792         HwiP_enableInterrupt(hwAttrs->intNum);  in SPICC32XXDMA_transferCancel()
799             (object->currentXferAmt - getDmaRemainingXfers(hwAttrs));  in SPICC32XXDMA_transferCancel()