37 bool UART_initModule(uint32_t moduleInstance, const eUSCI_UART_Config *config)  in UART_initModule()  argument
69     BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_SWRST_OFS) = 1;  in UART_initModule()
72     EUSCI_A_CMSIS(moduleInstance)->CTLW0 =  in UART_initModule()
73             (EUSCI_A_CMSIS(moduleInstance)->CTLW0 & ~EUSCI_A_CTLW0_SSEL_MASK)  in UART_initModule()
78         BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_MSB_OFS) = 1;  in UART_initModule()
80         BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_MSB_OFS) = 0;  in UART_initModule()
84         BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_SPB_OFS) = 1;  in UART_initModule()
86         BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_SPB_OFS) = 0;  in UART_initModule()
92         BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_PEN_OFS) = 0;  in UART_initModule()
95         BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_PEN_OFS) = 1;  in UART_initModule()
96         BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_PAR_OFS) = 0;  in UART_initModule()
99         BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_PEN_OFS) = 1;  in UART_initModule()
100         BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_PAR_OFS) = 1;  in UART_initModule()
105     EUSCI_A_CMSIS(moduleInstance)->BRW = config->clockPrescalar;  in UART_initModule()
106     EUSCI_A_CMSIS(moduleInstance)->MCTLW = ((config->secondModReg << 8)  in UART_initModule()
110     EUSCI_A_CMSIS(moduleInstance)->CTLW0 =  in UART_initModule()
111             (EUSCI_A_CMSIS(moduleInstance)->CTLW0  in UART_initModule()
118 void UART_transmitData(uint32_t moduleInstance, uint_fast8_t transmitData)  in UART_transmitData()  argument
121     if (!BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->IE, EUSCI_A_IE_TXIE_OFS))  in UART_transmitData()
122         while (!BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->IFG, EUSCI_A_IFG_TXIFG_OFS))  in UART_transmitData()
125     EUSCI_A_CMSIS(moduleInstance)->TXBUF = transmitData;  in UART_transmitData()
128 uint8_t UART_receiveData(uint32_t moduleInstance)  in UART_receiveData()  argument
131     if (!BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->IE, EUSCI_A_IE_RXIE_OFS))  in UART_receiveData()
132         while (!BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->IFG, EUSCI_A_IFG_RXIFG_OFS))  in UART_receiveData()
135     return EUSCI_A_CMSIS(moduleInstance)->RXBUF;  in UART_receiveData()
138 void UART_enableModule(uint32_t moduleInstance)  in UART_enableModule()  argument
141     BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_SWRST_OFS) = 0;  in UART_enableModule()
144 void UART_disableModule(uint32_t moduleInstance)  in UART_disableModule()  argument
147     BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_SWRST_OFS) = 1;  in UART_disableModule()
150 uint_fast8_t UART_queryStatusFlags(uint32_t moduleInstance, uint_fast8_t mask)  in UART_queryStatusFlags()  argument
162     return EUSCI_A_CMSIS(moduleInstance)->STATW & mask;  in UART_queryStatusFlags()
165 void UART_setDormant(uint32_t moduleInstance)  in UART_setDormant()  argument
167     BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_DORM_OFS) = 1;  in UART_setDormant()
170 void UART_resetDormant(uint32_t moduleInstance)  in UART_resetDormant()  argument
172     BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_DORM_OFS) = 0;  in UART_resetDormant()
175 void UART_transmitAddress(uint32_t moduleInstance, uint_fast8_t transmitAddress)  in UART_transmitAddress()  argument
178     BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_TXADDR_OFS) = 1;  in UART_transmitAddress()
181     EUSCI_A_CMSIS(moduleInstance)->TXBUF = transmitAddress;  in UART_transmitAddress()
184 void UART_transmitBreak(uint32_t moduleInstance)  in UART_transmitBreak()  argument
187     BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_TXBRK_OFS) = 1;  in UART_transmitBreak()
191             == (EUSCI_A_CMSIS(moduleInstance)->CTLW0  in UART_transmitBreak()
193         EUSCI_A_CMSIS(moduleInstance)->TXBUF =  in UART_transmitBreak()
196         EUSCI_A_CMSIS(moduleInstance)->TXBUF = DEFAULT_SYNC;  in UART_transmitBreak()
199     if (!BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->IE, EUSCI_A_IE_TXIE_OFS))  in UART_transmitBreak()
200         while (!BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->IFG, EUSCI_A_IFG_TXIFG_OFS))  in UART_transmitBreak()
204 uint32_t UART_getReceiveBufferAddressForDMA(uint32_t moduleInstance)  in UART_getReceiveBufferAddressForDMA()  argument
206     return (uint32_t)&EUSCI_A_CMSIS(moduleInstance)->RXBUF;  in UART_getReceiveBufferAddressForDMA()
209 uint32_t UART_getTransmitBufferAddressForDMA(uint32_t moduleInstance)  in UART_getTransmitBufferAddressForDMA()  argument
211     return (uint32_t)&EUSCI_B_CMSIS(moduleInstance)->TXBUF;  in UART_getTransmitBufferAddressForDMA()
214 void UART_selectDeglitchTime(uint32_t moduleInstance, uint32_t deglitchTime)  in UART_selectDeglitchTime()  argument
222     EUSCI_A_CMSIS(moduleInstance)->CTLW1 =  in UART_selectDeglitchTime()
223             (EUSCI_A_CMSIS(moduleInstance)->CTLW1 & ~(EUSCI_A_CTLW1_GLIT_MASK))  in UART_selectDeglitchTime()
228 void UART_enableInterrupt(uint32_t moduleInstance, uint_fast8_t mask)  in UART_enableInterrupt()  argument
246     EUSCI_A_CMSIS(moduleInstance)->IE |= locMask;  in UART_enableInterrupt()
251     EUSCI_A_CMSIS(moduleInstance)->CTLW0 |= locMask;  in UART_enableInterrupt()
254 void UART_disableInterrupt(uint32_t moduleInstance, uint_fast8_t mask)  in UART_disableInterrupt()  argument
271     EUSCI_A_CMSIS(moduleInstance)->IE &= ~locMask;  in UART_disableInterrupt()
276     EUSCI_A_CMSIS(moduleInstance)->CTLW0 &= ~locMask;  in UART_disableInterrupt()
279 uint_fast8_t UART_getInterruptStatus(uint32_t moduleInstance, uint8_t mask)  in UART_getInterruptStatus()  argument
288     return EUSCI_A_CMSIS(moduleInstance)->IFG & mask;  in UART_getInterruptStatus()
291 uint_fast8_t UART_getEnabledInterruptStatus(uint32_t moduleInstance)  in UART_getEnabledInterruptStatus()  argument
293     uint_fast8_t intStatus = UART_getInterruptStatus(moduleInstance,  in UART_getEnabledInterruptStatus()
295     uint_fast8_t intEnabled = EUSCI_A_CMSIS(moduleInstance)->IE;  in UART_getEnabledInterruptStatus()
307     intEnabled = EUSCI_A_CMSIS(moduleInstance)->CTLW0;  in UART_getEnabledInterruptStatus()
322 void UART_clearInterruptFlag(uint32_t moduleInstance, uint_fast8_t mask)  in UART_clearInterruptFlag()  argument
332     EUSCI_A_CMSIS(moduleInstance)->IFG &= ~(mask);  in UART_clearInterruptFlag()
335 void UART_registerInterrupt(uint32_t moduleInstance, void (*intHandler)(void))  in UART_registerInterrupt()  argument
337     switch (moduleInstance)  in UART_registerInterrupt()
364 void UART_unregisterInterrupt(uint32_t moduleInstance)  in UART_unregisterInterrupt()  argument
366     switch (moduleInstance)  in UART_unregisterInterrupt()