374 void SPI_enableInterrupt(uint32_t moduleInstance, uint_fast8_t mask)  in SPI_enableInterrupt()  argument
378         EUSCI_A_SPI_enableInterrupt(moduleInstance, mask);  in SPI_enableInterrupt()
381         EUSCI_B_SPI_enableInterrupt(moduleInstance, mask);  in SPI_enableInterrupt()
386 void SPI_disableInterrupt(uint32_t moduleInstance, uint_fast8_t mask)  in SPI_disableInterrupt()  argument
390         EUSCI_A_SPI_disableInterrupt(moduleInstance, mask);  in SPI_disableInterrupt()
393         EUSCI_B_SPI_disableInterrupt(moduleInstance, mask);  in SPI_disableInterrupt()
398 uint_fast8_t SPI_getInterruptStatus(uint32_t moduleInstance, uint16_t mask)  in SPI_getInterruptStatus()  argument
402         return EUSCI_A_SPI_getInterruptStatus(moduleInstance, mask);  in SPI_getInterruptStatus()
405         return EUSCI_B_SPI_getInterruptStatus(moduleInstance, mask);  in SPI_getInterruptStatus()
427 void SPI_clearInterruptFlag(uint32_t moduleInstance, uint_fast8_t mask)  in SPI_clearInterruptFlag()  argument
431         EUSCI_A_SPI_clearInterruptFlag(moduleInstance, mask);  in SPI_clearInterruptFlag()
434         EUSCI_B_SPI_clearInterruptFlag(moduleInstance, mask);  in SPI_clearInterruptFlag()
768 void EUSCI_B_SPI_enableInterrupt(uint32_t baseAddress, uint8_t mask)  in EUSCI_B_SPI_enableInterrupt()  argument
771             !(mask  in EUSCI_B_SPI_enableInterrupt()
775     EUSCI_B_CMSIS(baseAddress)->IE |= mask;  in EUSCI_B_SPI_enableInterrupt()
797 void EUSCI_B_SPI_disableInterrupt(uint32_t baseAddress, uint8_t mask)  in EUSCI_B_SPI_disableInterrupt()  argument
800             !(mask  in EUSCI_B_SPI_disableInterrupt()
804     EUSCI_B_CMSIS(baseAddress)->IE &= ~mask;  in EUSCI_B_SPI_disableInterrupt()
826 uint8_t EUSCI_B_SPI_getInterruptStatus(uint32_t baseAddress, uint8_t mask)  in EUSCI_B_SPI_getInterruptStatus()  argument
829             !(mask  in EUSCI_B_SPI_getInterruptStatus()
833     return EUSCI_B_CMSIS(baseAddress)->IFG & mask;  in EUSCI_B_SPI_getInterruptStatus()
851 void EUSCI_B_SPI_clearInterruptFlag(uint32_t baseAddress, uint8_t mask)  in EUSCI_B_SPI_clearInterruptFlag()  argument
854             !(mask  in EUSCI_B_SPI_clearInterruptFlag()
858     EUSCI_B_CMSIS(baseAddress)->IFG &= ~mask;  in EUSCI_B_SPI_clearInterruptFlag()
1179 void EUSCI_A_SPI_enableInterrupt(uint32_t baseAddress, uint8_t mask)  in EUSCI_A_SPI_enableInterrupt()  argument
1182             !(mask  in EUSCI_A_SPI_enableInterrupt()
1186     EUSCI_A_CMSIS(baseAddress)->IE |= mask;  in EUSCI_A_SPI_enableInterrupt()
1208 void EUSCI_A_SPI_disableInterrupt(uint32_t baseAddress, uint8_t mask)  in EUSCI_A_SPI_disableInterrupt()  argument
1211             !(mask  in EUSCI_A_SPI_disableInterrupt()
1215     EUSCI_A_CMSIS(baseAddress)->IE &= ~mask;  in EUSCI_A_SPI_disableInterrupt()
1237 uint8_t EUSCI_A_SPI_getInterruptStatus(uint32_t baseAddress, uint8_t mask)  in EUSCI_A_SPI_getInterruptStatus()  argument
1240             !(mask  in EUSCI_A_SPI_getInterruptStatus()
1244     return EUSCI_A_CMSIS(baseAddress)->IFG & mask;  in EUSCI_A_SPI_getInterruptStatus()
1262 void EUSCI_A_SPI_clearInterruptFlag(uint32_t baseAddress, uint8_t mask)  in EUSCI_A_SPI_clearInterruptFlag()  argument
1265             !(mask  in EUSCI_A_SPI_clearInterruptFlag()
1269     EUSCI_A_CMSIS(baseAddress)->IFG &= ~mask;  in EUSCI_A_SPI_clearInterruptFlag()