43     PSS->KEY = PSS_KEY_VALUE;  in __PSSUnlock()
48     PSS->KEY = 0;  in __PSSLock()
56     BITBAND_PERI(PSS->CTL0, PSS_CTL0_DCDC_FORCE_OFS) = 1;  in PSS_enableForcedDCDCOperation()
65     BITBAND_PERI(PSS->CTL0, PSS_CTL0_DCDC_FORCE_OFS) = 0;  in PSS_disableForcedDCDCOperation()
76         PSS->CTL0 |= (PSS_CTL0_SVMHOE | PSS_CTL0_SVMHOUTPOLAL);  in PSS_enableHighSidePinToggle()
79         BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVMHOUTPOLAL_OFS) = 0;  in PSS_enableHighSidePinToggle()
80         BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVMHOE_OFS) = 1;  in PSS_enableHighSidePinToggle()
90     BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVMHOE_OFS) = 0;  in PSS_disableHighSidePinToggle()
99     BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHOFF_OFS) = 0;  in PSS_enableHighSide()
108     BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHOFF_OFS) = 1;  in PSS_disableHighSide()
118         BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHLP_OFS) = 0;  in PSS_setHighSidePerformanceMode()
120         BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHLP_OFS) = 1;  in PSS_setHighSidePerformanceMode()
127     if (BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHLP_OFS))  in PSS_getHighSidePerformanceMode()
137     BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHS_OFS) = 1;  in PSS_enableHighSideMonitor()
146     BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHS_OFS) = 0;  in PSS_disableHighSideMonitor()
157     PSS->CTL0 &= ~PSS_CTL0_SVSMHTH_MASK;  in PSS_setHighSideVoltageTrigger()
158     PSS->CTL0 |= (triggerVoltage & 0x07) << PSS_CTL0_SVSMHTH_OFS;  in PSS_setHighSideVoltageTrigger()
165     return (uint_fast8_t)((PSS->CTL0 & PSS_CTL0_SVSMHTH_MASK)  in PSS_getHighSideVoltageTrigger()
172     BITBAND_PERI(PSS->IE,PSS_IE_SVSMHIE_OFS) = 1;  in PSS_enableInterrupt()
179     BITBAND_PERI(PSS->IE,PSS_IE_SVSMHIE_OFS) = 0;  in PSS_disableInterrupt()
185     return PSS->IFG;  in PSS_getInterruptStatus()
191     BITBAND_PERI(PSS->CLRIFG,PSS_CLRIFG_CLRSVSMHIFG_OFS) = 0;  in PSS_clearInterruptFlag()