70 void DMA_enableChannel(uint32_t channelNum)  in DMA_enableChannel()  argument
75     ASSERT((channelNum & 0xffff) < 8);  in DMA_enableChannel()
80     DMA_Control->ENASET = 1 << (channelNum & 0x0F);  in DMA_enableChannel()
83 void DMA_disableChannel(uint32_t channelNum)  in DMA_disableChannel()  argument
88     ASSERT((channelNum & 0xffff) < 8);  in DMA_disableChannel()
93     DMA_Control->ENACLR = 1 << (channelNum & 0x0F);  in DMA_disableChannel()
96 bool DMA_isChannelEnabled(uint32_t channelNum)  in DMA_isChannelEnabled()  argument
101     ASSERT((channelNum & 0xffff) < 8);  in DMA_isChannelEnabled()
107     return ((DMA_Control->ENASET & (1 << (channelNum & 0x0F))) ? true : false);  in DMA_isChannelEnabled()
142 void DMA_requestChannel(uint32_t channelNum)  in DMA_requestChannel()  argument
147     ASSERT((channelNum & 0xffff) < 8);  in DMA_requestChannel()
152     DMA_Control->SWREQ = 1 << (channelNum & 0x0F);  in DMA_requestChannel()
155 void DMA_enableChannelAttribute(uint32_t channelNum, uint32_t attr)  in DMA_enableChannelAttribute()  argument
160     ASSERT((channelNum & 0xffff) < 8);  in DMA_enableChannelAttribute()
172     channelNum &= 0x0F;  in DMA_enableChannelAttribute()
179         DMA_Control->USEBURSTSET = 1 << channelNum;  in DMA_enableChannelAttribute()
188         DMA_Control->ALTSET = 1 << channelNum;  in DMA_enableChannelAttribute()
196         DMA_Control->PRIOSET = 1 << channelNum;  in DMA_enableChannelAttribute()
204         DMA_Control->REQMASKSET = 1 << channelNum;  in DMA_enableChannelAttribute()
208 void DMA_disableChannelAttribute(uint32_t channelNum, uint32_t attr)  in DMA_disableChannelAttribute()  argument
213     ASSERT((channelNum & 0xffff) < 8);  in DMA_disableChannelAttribute()
225     channelNum &= 0x0F;  in DMA_disableChannelAttribute()
232         DMA_Control->USEBURSTCLR = 1 << channelNum;  in DMA_disableChannelAttribute()
241         DMA_Control->ALTCLR = 1 << channelNum;  in DMA_disableChannelAttribute()
249         DMA_Control->PRIOCLR = 1 << channelNum;  in DMA_disableChannelAttribute()
257         DMA_Control->REQMASKCLR = 1 << channelNum;  in DMA_disableChannelAttribute()
261 uint32_t DMA_getChannelAttribute(uint32_t channelNum)  in DMA_getChannelAttribute()  argument
268     ASSERT((channelNum & 0xffff) < 8);  in DMA_getChannelAttribute()
275     channelNum &= 0x0F;  in DMA_getChannelAttribute()
280     if (DMA_Control->USEBURSTSET & (1 << channelNum))  in DMA_getChannelAttribute()
288     if (DMA_Control->ALTSET & (1 << channelNum))  in DMA_getChannelAttribute()
296     if (DMA_Control->PRIOSET & (1 << channelNum))  in DMA_getChannelAttribute()
304     if (DMA_Control->REQMASKSET & (1 << channelNum))  in DMA_getChannelAttribute()
469 void DMA_setChannelScatterGather(uint32_t channelNum, uint32_t taskCount,  in DMA_setChannelScatterGather()  argument
478     ASSERT((channelNum & 0xffff) < 8);  in DMA_setChannelScatterGather()
489     channelNum &= 0x0F;  in DMA_setChannelScatterGather()
505     controlTable[channelNum].srcEndAddr = &pTaskTable[taskCount - 1].spare;  in DMA_setChannelScatterGather()
511     controlTable[channelNum].dstEndAddr = &controlTable[channelNum  in DMA_setChannelScatterGather()
520     controlTable[channelNum].control = (UDMA_CHCTL_DSTINC_32  in DMA_setChannelScatterGather()
535     DMA_Control->ALTCLR = 1 << channelNum;  in DMA_setChannelScatterGather()