83 UARTBaseValid(unsigned long ulBase)  in UARTBaseValid()  argument
85     return((ulBase == UARTA0_BASE) || (ulBase == UARTA1_BASE));  in UARTBaseValid()
102 UARTIntNumberGet(unsigned long ulBase)  in UARTIntNumberGet()  argument
116         if(g_ppulUARTIntMap[ulIdx][0] == ulBase)  in UARTIntNumberGet()
149 UARTParityModeSet(unsigned long ulBase, unsigned long ulParity)  in UARTParityModeSet()  argument
154     ASSERT(UARTBaseValid(ulBase));  in UARTParityModeSet()
164     HWREG(ulBase + UART_O_LCRH) = ((HWREG(ulBase + UART_O_LCRH) &  in UARTParityModeSet()
184 UARTParityModeGet(unsigned long ulBase)  in UARTParityModeGet()  argument
189     ASSERT(UARTBaseValid(ulBase));  in UARTParityModeGet()
194     return(HWREG(ulBase + UART_O_LCRH) &  in UARTParityModeGet()
217 UARTFIFOLevelSet(unsigned long ulBase, unsigned long ulTxLevel,  in UARTFIFOLevelSet()  argument
223     ASSERT(UARTBaseValid(ulBase));  in UARTFIFOLevelSet()
238     HWREG(ulBase + UART_O_IFLS) = ulTxLevel | ulRxLevel;  in UARTFIFOLevelSet()
260 UARTFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel,  in UARTFIFOLevelGet()  argument
268     ASSERT(UARTBaseValid(ulBase));  in UARTFIFOLevelGet()
273     ulTemp = HWREG(ulBase + UART_O_IFLS);  in UARTFIFOLevelGet()
313 UARTConfigSetExpClk(unsigned long ulBase, unsigned long ulUARTClk,  in UARTConfigSetExpClk()  argument
321     ASSERT(UARTBaseValid(ulBase));  in UARTConfigSetExpClk()
327     UARTDisable(ulBase);  in UARTConfigSetExpClk()
338         HWREG(ulBase + UART_O_CTL) |= UART_CTL_HSE;  in UARTConfigSetExpClk()
351         HWREG(ulBase + UART_O_CTL) &= ~(UART_CTL_HSE);  in UARTConfigSetExpClk()
362     HWREG(ulBase + UART_O_IBRD) = ulDiv / 64;  in UARTConfigSetExpClk()
363     HWREG(ulBase + UART_O_FBRD) = ulDiv % 64;  in UARTConfigSetExpClk()
368     HWREG(ulBase + UART_O_LCRH) = ulConfig;  in UARTConfigSetExpClk()
373     HWREG(ulBase + UART_O_FR) = 0;  in UARTConfigSetExpClk()
378     UARTEnable(ulBase);  in UARTConfigSetExpClk()
404 UARTConfigGetExpClk(unsigned long ulBase, unsigned long ulUARTClk,  in UARTConfigGetExpClk()  argument
412     ASSERT(UARTBaseValid(ulBase));  in UARTConfigGetExpClk()
417     ulInt = HWREG(ulBase + UART_O_IBRD);  in UARTConfigGetExpClk()
418     ulFrac = HWREG(ulBase + UART_O_FBRD);  in UARTConfigGetExpClk()
424     if(HWREG(ulBase + UART_O_CTL) & UART_CTL_HSE)  in UARTConfigGetExpClk()
436     *pulConfig = (HWREG(ulBase + UART_O_LCRH) &  in UARTConfigGetExpClk()
454 UARTEnable(unsigned long ulBase)  in UARTEnable()  argument
459     ASSERT(UARTBaseValid(ulBase));  in UARTEnable()
464     HWREG(ulBase + UART_O_LCRH) |= UART_LCRH_FEN;  in UARTEnable()
469     HWREG(ulBase + UART_O_CTL) |= (UART_CTL_UARTEN | UART_CTL_TXE |  in UARTEnable()
486 UARTDisable(unsigned long ulBase)  in UARTDisable()  argument
491     ASSERT(UARTBaseValid(ulBase));  in UARTDisable()
496     while(HWREG(ulBase + UART_O_FR) & UART_FR_BUSY)  in UARTDisable()
503     HWREG(ulBase + UART_O_LCRH) &= ~(UART_LCRH_FEN);  in UARTDisable()
508     HWREG(ulBase + UART_O_CTL) &= ~(UART_CTL_UARTEN | UART_CTL_TXE |  in UARTDisable()
524 UARTFIFOEnable(unsigned long ulBase)  in UARTFIFOEnable()  argument
529     ASSERT(UARTBaseValid(ulBase));  in UARTFIFOEnable()
534     HWREG(ulBase + UART_O_LCRH) |= UART_LCRH_FEN;  in UARTFIFOEnable()
549 UARTFIFODisable(unsigned long ulBase)  in UARTFIFODisable()  argument
554     ASSERT(UARTBaseValid(ulBase));  in UARTFIFODisable()
559     HWREG(ulBase + UART_O_LCRH) &= ~(UART_LCRH_FEN);  in UARTFIFODisable()
585 UARTModemControlSet(unsigned long ulBase, unsigned long ulControl)  in UARTModemControlSet()  argument
593     ASSERT(ulBase == UARTA1_BASE);  in UARTModemControlSet()
599     ulTemp = HWREG(ulBase + UART_O_CTL);  in UARTModemControlSet()
601     HWREG(ulBase + UART_O_CTL) = ulTemp;  in UARTModemControlSet()
627 UARTModemControlClear(unsigned long ulBase, unsigned long ulControl)  in UARTModemControlClear()  argument
634     ASSERT(ulBase == UARTA1_BASE);  in UARTModemControlClear()
640     ulTemp = HWREG(ulBase + UART_O_CTL);  in UARTModemControlClear()
642     HWREG(ulBase + UART_O_CTL) = ulTemp;  in UARTModemControlClear()
662 UARTModemControlGet(unsigned long ulBase)  in UARTModemControlGet()  argument
667     ASSERT(ulBase == UARTA1_BASE);  in UARTModemControlGet()
669     return(HWREG(ulBase + UART_O_CTL) & (UART_OUTPUT_RTS));  in UARTModemControlGet()
689 UARTModemStatusGet(unsigned long ulBase)  in UARTModemStatusGet()  argument
695     ASSERT(ulBase == UARTA1_BASE);  in UARTModemStatusGet()
697     return(HWREG(ulBase + UART_O_FR) & (UART_INPUT_CTS));  in UARTModemStatusGet()
726 UARTFlowControlSet(unsigned long ulBase, unsigned long ulMode)  in UARTFlowControlSet()  argument
732     ASSERT(UARTBaseValid(ulBase));  in UARTFlowControlSet()
738     HWREG(ulBase + UART_O_CTL) = ((HWREG(ulBase + UART_O_CTL) &  in UARTFlowControlSet()
763 UARTFlowControlGet(unsigned long ulBase)  in UARTFlowControlGet()  argument
769     ASSERT(UARTBaseValid(ulBase));  in UARTFlowControlGet()
771     return(HWREG(ulBase + UART_O_CTL) & (UART_FLOWCONTROL_TX |  in UARTFlowControlGet()
801 UARTTxIntModeSet(unsigned long ulBase, unsigned long ulMode)  in UARTTxIntModeSet()  argument
806     ASSERT(UARTBaseValid(ulBase));  in UARTTxIntModeSet()
813     HWREG(ulBase + UART_O_CTL) = ((HWREG(ulBase + UART_O_CTL) &  in UARTTxIntModeSet()
840 UARTTxIntModeGet(unsigned long ulBase)  in UARTTxIntModeGet()  argument
845     ASSERT(UARTBaseValid(ulBase));  in UARTTxIntModeGet()
850     return(HWREG(ulBase + UART_O_CTL) & (UART_TXINT_MODE_EOT |  in UARTTxIntModeGet()
868 UARTCharsAvail(unsigned long ulBase)  in UARTCharsAvail()  argument
873     ASSERT(UARTBaseValid(ulBase));  in UARTCharsAvail()
878     return((HWREG(ulBase + UART_O_FR) & UART_FR_RXFE) ? false : true);  in UARTCharsAvail()
895 UARTSpaceAvail(unsigned long ulBase)  in UARTSpaceAvail()  argument
900     ASSERT(UARTBaseValid(ulBase));  in UARTSpaceAvail()
905     return((HWREG(ulBase + UART_O_FR) & UART_FR_TXFF) ? false : true);  in UARTSpaceAvail()
925 UARTCharGetNonBlocking(unsigned long ulBase)  in UARTCharGetNonBlocking()  argument
930     ASSERT(UARTBaseValid(ulBase));  in UARTCharGetNonBlocking()
935     if(!(HWREG(ulBase + UART_O_FR) & UART_FR_RXFE))  in UARTCharGetNonBlocking()
940         return(HWREG(ulBase + UART_O_DR));  in UARTCharGetNonBlocking()
966 UARTCharGet(unsigned long ulBase)  in UARTCharGet()  argument
971     ASSERT(UARTBaseValid(ulBase));  in UARTCharGet()
976     while(HWREG(ulBase + UART_O_FR) & UART_FR_RXFE)  in UARTCharGet()
983     return(HWREG(ulBase + UART_O_DR));  in UARTCharGet()
1004 UARTCharPutNonBlocking(unsigned long ulBase, unsigned char ucData)  in UARTCharPutNonBlocking()  argument
1009     ASSERT(UARTBaseValid(ulBase));  in UARTCharPutNonBlocking()
1014     if(!(HWREG(ulBase + UART_O_FR) & UART_FR_TXFF))  in UARTCharPutNonBlocking()
1019         HWREG(ulBase + UART_O_DR) = ucData;  in UARTCharPutNonBlocking()
1050 UARTCharPut(unsigned long ulBase, unsigned char ucData)  in UARTCharPut()  argument
1055     ASSERT(UARTBaseValid(ulBase));  in UARTCharPut()
1060     while(HWREG(ulBase + UART_O_FR) & UART_FR_TXFF)  in UARTCharPut()
1067     HWREG(ulBase + UART_O_DR) = ucData;  in UARTCharPut()
1086 UARTBreakCtl(unsigned long ulBase, tBoolean bBreakState)  in UARTBreakCtl()  argument
1091     ASSERT(UARTBaseValid(ulBase));  in UARTBreakCtl()
1096     HWREG(ulBase + UART_O_LCRH) =  in UARTBreakCtl()
1098          (HWREG(ulBase + UART_O_LCRH) | UART_LCRH_BRK) :  in UARTBreakCtl()
1099          (HWREG(ulBase + UART_O_LCRH) & ~(UART_LCRH_BRK)));  in UARTBreakCtl()
1118 UARTBusy(unsigned long ulBase)  in UARTBusy()  argument
1123     ASSERT(UARTBaseValid(ulBase));  in UARTBusy()
1128     return((HWREG(ulBase + UART_O_FR) & UART_FR_BUSY) ? true : false);  in UARTBusy()
1151 UARTIntRegister(unsigned long ulBase, void (*pfnHandler)(void))  in UARTIntRegister()  argument
1158     ASSERT(UARTBaseValid(ulBase));  in UARTIntRegister()
1164     ulInt = UARTIntNumberGet(ulBase);  in UARTIntRegister()
1195 UARTIntUnregister(unsigned long ulBase)  in UARTIntUnregister()  argument
1202     ASSERT(UARTBaseValid(ulBase));  in UARTIntUnregister()
1207     ulInt = UARTIntNumberGet(ulBase);  in UARTIntUnregister()
1246 UARTIntEnable(unsigned long ulBase, unsigned long ulIntFlags)  in UARTIntEnable()  argument
1251     ASSERT(UARTBaseValid(ulBase));  in UARTIntEnable()
1256     HWREG(ulBase + UART_O_IM) |= ulIntFlags;  in UARTIntEnable()
1277 UARTIntDisable(unsigned long ulBase, unsigned long ulIntFlags)  in UARTIntDisable()  argument
1282     ASSERT(UARTBaseValid(ulBase));  in UARTIntDisable()
1287     HWREG(ulBase + UART_O_IM) &= ~(ulIntFlags);  in UARTIntDisable()
1307 UARTIntStatus(unsigned long ulBase, tBoolean bMasked)  in UARTIntStatus()  argument
1312     ASSERT(UARTBaseValid(ulBase));  in UARTIntStatus()
1320         return(HWREG(ulBase + UART_O_MIS));  in UARTIntStatus()
1324         return(HWREG(ulBase + UART_O_RIS));  in UARTIntStatus()
1355 UARTIntClear(unsigned long ulBase, unsigned long ulIntFlags)  in UARTIntClear()  argument
1360     ASSERT(UARTBaseValid(ulBase));  in UARTIntClear()
1365     HWREG(ulBase + UART_O_ICR) = ulIntFlags;  in UARTIntClear()
1391 UARTDMAEnable(unsigned long ulBase, unsigned long ulDMAFlags)  in UARTDMAEnable()  argument
1396     ASSERT(UARTBaseValid(ulBase));  in UARTDMAEnable()
1401     HWREG(ulBase + UART_O_DMACTL) |= ulDMAFlags;  in UARTDMAEnable()
1423 UARTDMADisable(unsigned long ulBase, unsigned long ulDMAFlags)  in UARTDMADisable()  argument
1428     ASSERT(UARTBaseValid(ulBase));  in UARTDMADisable()
1433     HWREG(ulBase + UART_O_DMACTL) &= ~ulDMAFlags;  in UARTDMADisable()
1454 UARTRxErrorGet(unsigned long ulBase)  in UARTRxErrorGet()  argument
1459     ASSERT(UARTBaseValid(ulBase));  in UARTRxErrorGet()
1464     return(HWREG(ulBase + UART_O_RSR) & 0x0000000F);  in UARTRxErrorGet()
1482 UARTRxErrorClear(unsigned long ulBase)  in UARTRxErrorClear()  argument
1487     ASSERT(UARTBaseValid(ulBase));  in UARTRxErrorClear()
1493     HWREG(ulBase + UART_O_ECR) = 0;  in UARTRxErrorClear()