154 uDMAChannelEnable(unsigned long ulChannelNum)  in uDMAChannelEnable()  argument
159     ASSERT((ulChannelNum & 0xffff) < 32);  in uDMAChannelEnable()
164     HWREG(UDMA_BASE + UDMA_O_ENASET) = 1 << (ulChannelNum & 0x1f);  in uDMAChannelEnable()
181 uDMAChannelDisable(unsigned long ulChannelNum)  in uDMAChannelDisable()  argument
186     ASSERT((ulChannelNum & 0xffff) < 32);  in uDMAChannelDisable()
191     HWREG(UDMA_BASE + UDMA_O_ENACLR) = 1 << (ulChannelNum & 0x1f);  in uDMAChannelDisable()
208 uDMAChannelIsEnabled(unsigned long ulChannelNum)  in uDMAChannelIsEnabled()  argument
213     ASSERT((ulChannelNum & 0xffff) < 32);  in uDMAChannelIsEnabled()
220             (1 << (ulChannelNum & 0x1f))) ? true : false);  in uDMAChannelIsEnabled()
322 uDMAChannelRequest(unsigned long ulChannelNum)  in uDMAChannelRequest()  argument
327     ASSERT((ulChannelNum & 0xffff) < 32);  in uDMAChannelRequest()
332     HWREG(UDMA_BASE + UDMA_O_SWREQ) = 1 << (ulChannelNum & 0x1f);  in uDMAChannelRequest()
358 uDMAChannelAttributeEnable(unsigned long ulChannelNum, unsigned long ulAttr)  in uDMAChannelAttributeEnable()  argument
363     ASSERT((ulChannelNum & 0xffff) < 32);  in uDMAChannelAttributeEnable()
372     ulChannelNum &= 0x1f;  in uDMAChannelAttributeEnable()
379         HWREG(UDMA_BASE + UDMA_O_USEBURSTSET) = 1 << ulChannelNum;  in uDMAChannelAttributeEnable()
388         HWREG(UDMA_BASE + UDMA_O_ALTSET) = 1 << ulChannelNum;  in uDMAChannelAttributeEnable()
396         HWREG(UDMA_BASE + UDMA_O_PRIOSET) = 1 << ulChannelNum;  in uDMAChannelAttributeEnable()
404         HWREG(UDMA_BASE + UDMA_O_REQMASKSET) = 1 << ulChannelNum;  in uDMAChannelAttributeEnable()
431 uDMAChannelAttributeDisable(unsigned long ulChannelNum, unsigned long ulAttr)  in uDMAChannelAttributeDisable()  argument
436     ASSERT((ulChannelNum & 0xffff) < 32);  in uDMAChannelAttributeDisable()
445     ulChannelNum &= 0x1f;  in uDMAChannelAttributeDisable()
452         HWREG(UDMA_BASE + UDMA_O_USEBURSTCLR) = 1 << ulChannelNum;  in uDMAChannelAttributeDisable()
461         HWREG(UDMA_BASE + UDMA_O_ALTCLR) = 1 << ulChannelNum;  in uDMAChannelAttributeDisable()
469         HWREG(UDMA_BASE + UDMA_O_PRIOCLR) = 1 << ulChannelNum;  in uDMAChannelAttributeDisable()
477         HWREG(UDMA_BASE + UDMA_O_REQMASKCLR) = 1 << ulChannelNum;  in uDMAChannelAttributeDisable()
502 uDMAChannelAttributeGet(unsigned long ulChannelNum)  in uDMAChannelAttributeGet()  argument
509     ASSERT((ulChannelNum & 0xffff) < 32);  in uDMAChannelAttributeGet()
516     ulChannelNum &= 0x1f;  in uDMAChannelAttributeGet()
521     if(HWREG(UDMA_BASE + UDMA_O_USEBURSTSET) & (1 << ulChannelNum))  in uDMAChannelAttributeGet()
529     if(HWREG(UDMA_BASE + UDMA_O_ALTSET) & (1 << ulChannelNum))  in uDMAChannelAttributeGet()
537     if(HWREG(UDMA_BASE + UDMA_O_PRIOSET) & (1 << ulChannelNum))  in uDMAChannelAttributeGet()
545     if(HWREG(UDMA_BASE + UDMA_O_REQMASKSET) & (1 << ulChannelNum))  in uDMAChannelAttributeGet()
866 uDMAChannelScatterGatherSet(unsigned long ulChannelNum, unsigned ulTaskCount,  in uDMAChannelScatterGatherSet()  argument
875     ASSERT((ulChannelNum & 0xffff) < 32);  in uDMAChannelScatterGatherSet()
886     ulChannelNum &= 0x1f;  in uDMAChannelScatterGatherSet()
902     pControlTable[ulChannelNum].pvSrcEndAddr =  in uDMAChannelScatterGatherSet()
909     pControlTable[ulChannelNum].pvDstEndAddr =  in uDMAChannelScatterGatherSet()
910         &pControlTable[ulChannelNum | UDMA_ALT_SELECT].ulSpare;  in uDMAChannelScatterGatherSet()
918     pControlTable[ulChannelNum].ulControl =  in uDMAChannelScatterGatherSet()
1224     unsigned long ulChannelNum;  in uDMAChannelAssign()  local
1235     ulChannelNum = ulMapping & 0x1f;  in uDMAChannelAssign()
1242     ulMapReg = UDMA_BASE + UDMA_O_CHMAP0 + ((ulChannelNum / 8) * 4);  in uDMAChannelAssign()
1243     ulMapShift = (ulChannelNum % 8) * 4;  in uDMAChannelAssign()