33 #define reg_uart_data_buf_adr(i)  (0x140080+(i)*0x40)  //uart(i)  argument
35 #define reg_uart_data_buf(i,j)    REG_ADDR8(reg_uart_data_buf_adr(i)+(j)) //uart(i)_buf(j)  argument
36 #define reg_uart_data_hword_buf(i,j)  REG_ADDR16(reg_uart_data_buf_adr(i)+(j)*2)  argument
38 #define reg_uart_data_word_buf(i)  REG_ADDR32(reg_uart_data_buf_adr(i)) //uart(i)  argument
40 #define reg_uart_clk_div(i)		REG_ADDR16(0x140084+(i)*0x40)  argument
47 #define reg_uart_ctrl0(i)			REG_ADDR8(0x140086+(i)*0x40)  argument
55 #define reg_uart_ctrl1(i)         		REG_ADDR8(0x140087+(i)*0x40)  argument
68 #define reg_uart_ctrl2(i)			REG_ADDR16(0x140088+(i)*0x40)  argument
78 #define reg_uart_ctrl3(i)        	REG_ADDR8(0x140089+(i)*0x40)  argument
85 #define reg_uart_rx_timeout0(i)	REG_ADDR8(0x14008a+(i)*0x40)  argument
91 #define reg_uart_rx_timeout1(i)  REG_ADDR8(0x14008b+0x40*(i))  argument
104 #define reg_uart_buf_cnt(i)       REG_ADDR8(0x14008c+(i)*0x40)  argument
110 #define reg_uart_status1(i)			REG_ADDR8(0x14008d+((i)*0x40))  argument
121 #define reg_uart_status2(i)       REG_ADDR8((0x14008e) +(0x40*(i)))  argument
130 #define reg_uart_state(i)       REG_ADDR8(0x14008f+0x40*(i))  argument