573   uint32_t tmpcr2;  in LL_TIM_HALLSENSOR_Init()  local
588   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in LL_TIM_HALLSENSOR_Init()
600   tmpcr2 |= TIM_CR2_TI1S;  in LL_TIM_HALLSENSOR_Init()
603   tmpcr2 |= LL_TIM_TRGO_OC2REF;  in LL_TIM_HALLSENSOR_Init()
626   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in LL_TIM_HALLSENSOR_Init()
758   uint32_t tmpcr2;  in OC1Config()  local
775   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC1Config()
804     MODIFY_REG(tmpcr2, TIM_CR2_OIS1, TIM_OCInitStruct->OCIdleState);  in OC1Config()
807     MODIFY_REG(tmpcr2, TIM_CR2_OIS1N, TIM_OCInitStruct->OCNIdleState << 1U);  in OC1Config()
811   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC1Config()
837   uint32_t tmpcr2;  in OC2Config()  local
854   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC2Config()
883     MODIFY_REG(tmpcr2, TIM_CR2_OIS2, TIM_OCInitStruct->OCIdleState << 2U);  in OC2Config()
886     MODIFY_REG(tmpcr2, TIM_CR2_OIS2N, TIM_OCInitStruct->OCNIdleState << 3U);  in OC2Config()
890   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC2Config()
916   uint32_t tmpcr2;  in OC3Config()  local
933   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC3Config()
962     MODIFY_REG(tmpcr2, TIM_CR2_OIS3, TIM_OCInitStruct->OCIdleState << 4U);  in OC3Config()
965     MODIFY_REG(tmpcr2, TIM_CR2_OIS3N, TIM_OCInitStruct->OCNIdleState << 5U);  in OC3Config()
969   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC3Config()
995   uint32_t tmpcr2;  in OC4Config()  local
1012   tmpcr2 =  LL_TIM_ReadReg(TIMx, CR2);  in OC4Config()
1035     MODIFY_REG(tmpcr2, TIM_CR2_OIS4, TIM_OCInitStruct->OCIdleState << 6U);  in OC4Config()
1039   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC4Config()