Lines Matching refs:SUBGHZSPI
1577 assert_param(IS_SUBGHZ_ALL_INSTANCE(SUBGHZSPI)); in SUBGHZSPI_Init()
1580 CLEAR_BIT(SUBGHZSPI->CR1, SPI_CR1_SPE); in SUBGHZSPI_Init()
1592 WRITE_REG(SUBGHZSPI->CR1, (SPI_CR1_MSTR | SPI_CR1_SSI | BaudratePrescaler | SPI_CR1_SSM)); in SUBGHZSPI_Init()
1600 WRITE_REG(SUBGHZSPI->CR2, (SPI_CR2_FRXTH | SPI_CR2_DS_0 | SPI_CR2_DS_1 | SPI_CR2_DS_2)); in SUBGHZSPI_Init()
1603 SET_BIT(SUBGHZSPI->CR1, SPI_CR1_SPE); in SUBGHZSPI_Init()
1613 assert_param(IS_SUBGHZ_ALL_INSTANCE(SUBGHZSPI)); in SUBGHZSPI_DeInit()
1616 CLEAR_BIT(SUBGHZSPI->CR1, SPI_CR1_SPE); in SUBGHZSPI_DeInit()
1646 } while (READ_BIT(SUBGHZSPI->SR, SPI_SR_TXE) != (SPI_SR_TXE)); in SUBGHZSPI_Transmit()
1650 __IO uint8_t *spidr = ((__IO uint8_t *)&SUBGHZSPI->DR); in SUBGHZSPI_Transmit()
1653 *((__IO uint8_t *)&SUBGHZSPI->DR) = Data; in SUBGHZSPI_Transmit()
1670 } while (READ_BIT(SUBGHZSPI->SR, SPI_SR_RXNE) != (SPI_SR_RXNE)); in SUBGHZSPI_Transmit()
1673 READ_REG(SUBGHZSPI->DR); in SUBGHZSPI_Transmit()
1705 } while (READ_BIT(SUBGHZSPI->SR, SPI_SR_TXE) != (SPI_SR_TXE)); in SUBGHZSPI_Receive()
1709 __IO uint8_t *spidr = ((__IO uint8_t *)&SUBGHZSPI->DR); in SUBGHZSPI_Receive()
1712 *((__IO uint8_t *)&SUBGHZSPI->DR) = SUBGHZ_DUMMY_DATA; in SUBGHZSPI_Receive()
1729 } while (READ_BIT(SUBGHZSPI->SR, SPI_SR_RXNE) != (SPI_SR_RXNE)); in SUBGHZSPI_Receive()
1732 *pData = (uint8_t)(READ_REG(SUBGHZSPI->DR)); in SUBGHZSPI_Receive()