1394   uint32_t regvalue;  in HAL_RCC_GetOscConfig()  local
1406     regvalue = RCC->CR; /* Control register */  in HAL_RCC_GetOscConfig()
1411     RCC_OscInitStruct->HSEState = (regvalue & RCC_HSE_BYPASS_PWR);  in HAL_RCC_GetOscConfig()
1412     RCC_OscInitStruct->HSEDiv   = (regvalue & RCC_CR_HSEPRE);  in HAL_RCC_GetOscConfig()
1415     RCC_OscInitStruct->MSIState            = (regvalue & RCC_CR_MSION);  in HAL_RCC_GetOscConfig()
1417     RCC_OscInitStruct->MSIClockRange       = (regvalue & RCC_CR_MSIRANGE);  in HAL_RCC_GetOscConfig()
1420     RCC_OscInitStruct->HSIState            = (regvalue & RCC_CR_HSION);  in HAL_RCC_GetOscConfig()
1424     RCC_OscInitStruct->PLL.PLLState  = ((regvalue & RCC_CR_PLLON) >> RCC_CR_PLLON_Pos) + 1U;  in HAL_RCC_GetOscConfig()
1433     regvalue = RCC->BDCR;  in HAL_RCC_GetOscConfig()
1436     RCC_OscInitStruct->LSEState = (regvalue & RCC_LSE_BYPASS);  in HAL_RCC_GetOscConfig()
1439     regvalue = RCC->CSR;  in HAL_RCC_GetOscConfig()
1442     RCC_OscInitStruct->LSIState = (regvalue & RCC_LSI_ON);  in HAL_RCC_GetOscConfig()
1443     RCC_OscInitStruct->LSIDiv = (regvalue & RCC_CSR_LSIPRE);  in HAL_RCC_GetOscConfig()
1457   uint32_t regvalue;  in HAL_RCC_GetClockConfig()  local
1470     regvalue = RCC->CFGR;  in HAL_RCC_GetClockConfig()
1473     RCC_ClkInitStruct->SYSCLKSource = (regvalue & RCC_CFGR_SWS);  in HAL_RCC_GetClockConfig()
1476     RCC_ClkInitStruct->AHBCLKDivider = (regvalue & RCC_CFGR_HPRE);  in HAL_RCC_GetClockConfig()
1479     RCC_ClkInitStruct->APB1CLKDivider = (regvalue & RCC_CFGR_PPRE1);  in HAL_RCC_GetClockConfig()
1482     RCC_ClkInitStruct->APB2CLKDivider = (regvalue & RCC_CFGR_PPRE2);  in HAL_RCC_GetClockConfig()
1485     regvalue = RCC->EXTCFGR;  in HAL_RCC_GetClockConfig()
1489     RCC_ClkInitStruct->AHBCLK2Divider =  (regvalue & RCC_EXTCFGR_C2HPRE);  in HAL_RCC_GetClockConfig()
1493     RCC_ClkInitStruct->AHBCLK3Divider = ((regvalue & RCC_EXTCFGR_SHDHPRE) << 4);  in HAL_RCC_GetClockConfig()