Lines Matching refs:hdma
112 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32…
113 static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma);
114 static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma);
152 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) in HAL_DMA_Init() argument
155 if (hdma == NULL) in HAL_DMA_Init()
161 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); in HAL_DMA_Init()
162 assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); in HAL_DMA_Init()
163 assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); in HAL_DMA_Init()
164 assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); in HAL_DMA_Init()
165 assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); in HAL_DMA_Init()
166 assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); in HAL_DMA_Init()
167 assert_param(IS_DMA_MODE(hdma->Init.Mode)); in HAL_DMA_Init()
168 assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); in HAL_DMA_Init()
170 assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request)); in HAL_DMA_Init()
173 if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) in HAL_DMA_Init()
176 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chann… in HAL_DMA_Init()
177 hdma->DmaBaseAddress = DMA1; in HAL_DMA_Init()
182 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Chann… in HAL_DMA_Init()
183 hdma->DmaBaseAddress = DMA2; in HAL_DMA_Init()
187 hdma->State = HAL_DMA_STATE_BUSY; in HAL_DMA_Init()
190 CLEAR_BIT(hdma->Instance->CCR, (DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ in HAL_DMA_Init()
195 SET_BIT(hdma->Instance->CCR, (hdma->Init.Direction | \ in HAL_DMA_Init()
196 hdma->Init.PeriphInc | hdma->Init.MemInc | \ in HAL_DMA_Init()
197 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | \ in HAL_DMA_Init()
198 hdma->Init.Mode | hdma->Init.Priority)); in HAL_DMA_Init()
203 DMA_CalcDMAMUXChannelBaseAndMask(hdma); in HAL_DMA_Init()
205 if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY) in HAL_DMA_Init()
208 hdma->Init.Request = DMA_REQUEST_MEM2MEM; in HAL_DMA_Init()
212 hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID); in HAL_DMA_Init()
215 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Init()
217 if (((hdma->Init.Request > 0UL) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3))) in HAL_DMA_Init()
222 DMA_CalcDMAMUXRequestGenBaseAndMask(hdma); in HAL_DMA_Init()
225 hdma->DMAmuxRequestGen->RGCR = 0U; in HAL_DMA_Init()
228 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_Init()
232 hdma->DMAmuxRequestGen = NULL; in HAL_DMA_Init()
233 hdma->DMAmuxRequestGenStatus = NULL; in HAL_DMA_Init()
234 hdma->DMAmuxRequestGenStatusMask = 0U; in HAL_DMA_Init()
238 hdma->ErrorCode = HAL_DMA_ERROR_NONE; in HAL_DMA_Init()
241 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_Init()
244 __HAL_UNLOCK(hdma); in HAL_DMA_Init()
255 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) in HAL_DMA_DeInit() argument
258 if (NULL == hdma) in HAL_DMA_DeInit()
264 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); in HAL_DMA_DeInit()
267 __HAL_DMA_DISABLE(hdma); in HAL_DMA_DeInit()
270 if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) in HAL_DMA_DeInit()
273 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chann… in HAL_DMA_DeInit()
274 hdma->DmaBaseAddress = DMA1; in HAL_DMA_DeInit()
279 …hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Chann… in HAL_DMA_DeInit()
280 hdma->DmaBaseAddress = DMA2; in HAL_DMA_DeInit()
284 hdma->Instance->CCR = 0U; in HAL_DMA_DeInit()
287 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_DeInit()
292 DMA_CalcDMAMUXChannelBaseAndMask(hdma); in HAL_DMA_DeInit()
295 hdma->DMAmuxChannel->CCR = 0U; in HAL_DMA_DeInit()
298 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_DeInit()
301 if (((hdma->Init.Request > 0UL) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3))) in HAL_DMA_DeInit()
306 DMA_CalcDMAMUXRequestGenBaseAndMask(hdma); in HAL_DMA_DeInit()
309 hdma->DMAmuxRequestGen->RGCR = 0U; in HAL_DMA_DeInit()
312 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_DeInit()
315 hdma->DMAmuxRequestGen = NULL; in HAL_DMA_DeInit()
316 hdma->DMAmuxRequestGenStatus = NULL; in HAL_DMA_DeInit()
317 hdma->DMAmuxRequestGenStatusMask = 0U; in HAL_DMA_DeInit()
320 hdma->XferCpltCallback = NULL; in HAL_DMA_DeInit()
321 hdma->XferHalfCpltCallback = NULL; in HAL_DMA_DeInit()
322 hdma->XferErrorCallback = NULL; in HAL_DMA_DeInit()
323 hdma->XferAbortCallback = NULL; in HAL_DMA_DeInit()
326 hdma->ErrorCode = HAL_DMA_ERROR_NONE; in HAL_DMA_DeInit()
329 hdma->State = HAL_DMA_STATE_RESET; in HAL_DMA_DeInit()
332 __HAL_UNLOCK(hdma); in HAL_DMA_DeInit()
370 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, … in HAL_DMA_Start() argument
378 __HAL_LOCK(hdma); in HAL_DMA_Start()
380 if (hdma->State == HAL_DMA_STATE_READY) in HAL_DMA_Start()
383 hdma->State = HAL_DMA_STATE_BUSY; in HAL_DMA_Start()
386 hdma->ErrorCode = HAL_DMA_ERROR_NONE; in HAL_DMA_Start()
389 __HAL_DMA_DISABLE(hdma); in HAL_DMA_Start()
392 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); in HAL_DMA_Start()
395 __HAL_DMA_ENABLE(hdma); in HAL_DMA_Start()
400 hdma->ErrorCode = HAL_DMA_ERROR_BUSY; in HAL_DMA_Start()
403 __HAL_UNLOCK(hdma); in HAL_DMA_Start()
421 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddres… in HAL_DMA_Start_IT() argument
429 __HAL_LOCK(hdma); in HAL_DMA_Start_IT()
431 if (hdma->State == HAL_DMA_STATE_READY) in HAL_DMA_Start_IT()
434 hdma->State = HAL_DMA_STATE_BUSY; in HAL_DMA_Start_IT()
435 hdma->ErrorCode = HAL_DMA_ERROR_NONE; in HAL_DMA_Start_IT()
438 __HAL_DMA_DISABLE(hdma); in HAL_DMA_Start_IT()
441 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); in HAL_DMA_Start_IT()
445 if (NULL != hdma->XferHalfCpltCallback) in HAL_DMA_Start_IT()
448 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); in HAL_DMA_Start_IT()
452 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); in HAL_DMA_Start_IT()
453 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); in HAL_DMA_Start_IT()
457 if ((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U) in HAL_DMA_Start_IT()
460 hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE; in HAL_DMA_Start_IT()
463 if (hdma->DMAmuxRequestGen != NULL) in HAL_DMA_Start_IT()
467 hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE; in HAL_DMA_Start_IT()
471 __HAL_DMA_ENABLE(hdma); in HAL_DMA_Start_IT()
476 hdma->ErrorCode = HAL_DMA_ERROR_BUSY; in HAL_DMA_Start_IT()
479 __HAL_UNLOCK(hdma); in HAL_DMA_Start_IT()
494 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) in HAL_DMA_Abort() argument
497 if (NULL == hdma) in HAL_DMA_Abort()
503 if (hdma->State != HAL_DMA_STATE_BUSY) in HAL_DMA_Abort()
505 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; in HAL_DMA_Abort()
508 __HAL_UNLOCK(hdma); in HAL_DMA_Abort()
515 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); in HAL_DMA_Abort()
518 hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; in HAL_DMA_Abort()
521 __HAL_DMA_DISABLE(hdma); in HAL_DMA_Abort()
524 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_Abort()
527 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Abort()
529 if (hdma->DMAmuxRequestGen != NULL) in HAL_DMA_Abort()
533 hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; in HAL_DMA_Abort()
536 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_Abort()
540 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_Abort()
543 __HAL_UNLOCK(hdma); in HAL_DMA_Abort()
555 HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) in HAL_DMA_Abort_IT() argument
559 if (hdma->State != HAL_DMA_STATE_BUSY) in HAL_DMA_Abort_IT()
562 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; in HAL_DMA_Abort_IT()
569 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); in HAL_DMA_Abort_IT()
572 __HAL_DMA_DISABLE(hdma); in HAL_DMA_Abort_IT()
575 hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; in HAL_DMA_Abort_IT()
578 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_Abort_IT()
581 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Abort_IT()
583 if (hdma->DMAmuxRequestGen != NULL) in HAL_DMA_Abort_IT()
587 hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; in HAL_DMA_Abort_IT()
590 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_Abort_IT()
594 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_Abort_IT()
597 __HAL_UNLOCK(hdma); in HAL_DMA_Abort_IT()
600 if (hdma->XferAbortCallback != NULL) in HAL_DMA_Abort_IT()
602 hdma->XferAbortCallback(hdma); in HAL_DMA_Abort_IT()
616 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef Com… in HAL_DMA_PollForTransfer() argument
621 if (hdma->State != HAL_DMA_STATE_BUSY) in HAL_DMA_PollForTransfer()
624 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; in HAL_DMA_PollForTransfer()
625 __HAL_UNLOCK(hdma); in HAL_DMA_PollForTransfer()
630 if ((hdma->Instance->CCR & DMA_CCR_CIRC) != 0U) in HAL_DMA_PollForTransfer()
632 hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED; in HAL_DMA_PollForTransfer()
640 temp = DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU); in HAL_DMA_PollForTransfer()
645 temp = DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU); in HAL_DMA_PollForTransfer()
651 while ((hdma->DmaBaseAddress->ISR & temp) == 0U) in HAL_DMA_PollForTransfer()
653 if ((hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1CU))) != 0U) in HAL_DMA_PollForTransfer()
658 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
661 hdma->ErrorCode = HAL_DMA_ERROR_TE; in HAL_DMA_PollForTransfer()
664 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_PollForTransfer()
667 __HAL_UNLOCK(hdma); in HAL_DMA_PollForTransfer()
677 hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; in HAL_DMA_PollForTransfer()
680 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_PollForTransfer()
683 __HAL_UNLOCK(hdma); in HAL_DMA_PollForTransfer()
691 if (hdma->DMAmuxRequestGen != NULL) in HAL_DMA_PollForTransfer()
694 if ((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U) in HAL_DMA_PollForTransfer()
697 hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE; in HAL_DMA_PollForTransfer()
700 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in HAL_DMA_PollForTransfer()
703 hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN; in HAL_DMA_PollForTransfer()
708 if ((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U) in HAL_DMA_PollForTransfer()
711 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_PollForTransfer()
714 hdma->ErrorCode |= HAL_DMA_ERROR_SYNC; in HAL_DMA_PollForTransfer()
720 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
723 __HAL_UNLOCK(hdma); in HAL_DMA_PollForTransfer()
727 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_PollForTransfer()
732 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
744 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) in HAL_DMA_IRQHandler() argument
746 uint32_t flag_it = hdma->DmaBaseAddress->ISR; in HAL_DMA_IRQHandler()
747 uint32_t source_it = hdma->Instance->CCR; in HAL_DMA_IRQHandler()
750 …if (((flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_HT)… in HAL_DMA_IRQHandler()
753 if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) in HAL_DMA_IRQHandler()
756 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); in HAL_DMA_IRQHandler()
759 hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1CU); in HAL_DMA_IRQHandler()
764 if (hdma->XferHalfCpltCallback != NULL) in HAL_DMA_IRQHandler()
767 hdma->XferHalfCpltCallback(hdma); in HAL_DMA_IRQHandler()
772 …else if ((0U != (flag_it & (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU)))) && (0U != (source_it &… in HAL_DMA_IRQHandler()
774 if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) in HAL_DMA_IRQHandler()
777 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); in HAL_DMA_IRQHandler()
780 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_IRQHandler()
783 __HAL_DMA_CLEAR_FLAG(hdma, (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU))); in HAL_DMA_IRQHandler()
786 __HAL_UNLOCK(hdma); in HAL_DMA_IRQHandler()
788 if (hdma->XferCpltCallback != NULL) in HAL_DMA_IRQHandler()
791 hdma->XferCpltCallback(hdma); in HAL_DMA_IRQHandler()
796 …else if (((flag_it & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_I… in HAL_DMA_IRQHandler()
801 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); in HAL_DMA_IRQHandler()
804 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_IRQHandler()
807 hdma->ErrorCode = HAL_DMA_ERROR_TE; in HAL_DMA_IRQHandler()
810 hdma->State = HAL_DMA_STATE_READY; in HAL_DMA_IRQHandler()
813 __HAL_UNLOCK(hdma); in HAL_DMA_IRQHandler()
815 if (hdma->XferErrorCallback != NULL) in HAL_DMA_IRQHandler()
818 hdma->XferErrorCallback(hdma); in HAL_DMA_IRQHandler()
838 HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Callb… in HAL_DMA_RegisterCallback() argument
843 __HAL_LOCK(hdma); in HAL_DMA_RegisterCallback()
845 if (hdma->State == HAL_DMA_STATE_READY) in HAL_DMA_RegisterCallback()
850 hdma->XferCpltCallback = pCallback; in HAL_DMA_RegisterCallback()
854 hdma->XferHalfCpltCallback = pCallback; in HAL_DMA_RegisterCallback()
858 hdma->XferErrorCallback = pCallback; in HAL_DMA_RegisterCallback()
862 hdma->XferAbortCallback = pCallback; in HAL_DMA_RegisterCallback()
876 __HAL_UNLOCK(hdma); in HAL_DMA_RegisterCallback()
889 HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Cal… in HAL_DMA_UnRegisterCallback() argument
894 __HAL_LOCK(hdma); in HAL_DMA_UnRegisterCallback()
896 if (hdma->State == HAL_DMA_STATE_READY) in HAL_DMA_UnRegisterCallback()
901 hdma->XferCpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
905 hdma->XferHalfCpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
909 hdma->XferErrorCallback = NULL; in HAL_DMA_UnRegisterCallback()
913 hdma->XferAbortCallback = NULL; in HAL_DMA_UnRegisterCallback()
917 hdma->XferCpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
918 hdma->XferHalfCpltCallback = NULL; in HAL_DMA_UnRegisterCallback()
919 hdma->XferErrorCallback = NULL; in HAL_DMA_UnRegisterCallback()
920 hdma->XferAbortCallback = NULL; in HAL_DMA_UnRegisterCallback()
934 __HAL_UNLOCK(hdma); in HAL_DMA_UnRegisterCallback()
967 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) in HAL_DMA_GetState() argument
970 return hdma->State; in HAL_DMA_GetState()
979 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) in HAL_DMA_GetError() argument
982 return hdma->ErrorCode; in HAL_DMA_GetError()
1023 HAL_StatusTypeDef HAL_DMA_ConfigChannelAttributes(DMA_HandleTypeDef *hdma, uint32_t ChannelAttribut… in HAL_DMA_ConfigChannelAttributes() argument
1033 if (hdma == NULL) in HAL_DMA_ConfigChannelAttributes()
1043 ccr = READ_REG(hdma->Instance->CCR); in HAL_DMA_ConfigChannelAttributes()
1061 if ((hdma->Instance->CCR & DMA_CCR_SECM) == DMA_CCR_SECM) in HAL_DMA_ConfigChannelAttributes()
1137 WRITE_REG(hdma->Instance->CCR, ccr); in HAL_DMA_ConfigChannelAttributes()
1151 HAL_StatusTypeDef HAL_DMA_GetConfigChannelAttributes(DMA_HandleTypeDef *hdma, uint32_t *ChannelAttr… in HAL_DMA_GetConfigChannelAttributes() argument
1157 if ((hdma == NULL) || (ChannelAttributes == NULL)) in HAL_DMA_GetConfigChannelAttributes()
1164 …read_attributes = READ_BIT(hdma->Instance->CCR, DMA_CCR_PRIV | DMA_CCR_SECM | DMA_CCR_SSEC | DMA_C… in HAL_DMA_GetConfigChannelAttributes()
1181 read_attributes = READ_BIT(hdma->Instance->CCR, DMA_CCR_PRIV | DMA_CCR_SECM); in HAL_DMA_GetConfigChannelAttributes()
1209 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32… in DMA_SetConfig() argument
1212 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in DMA_SetConfig()
1214 if (hdma->DMAmuxRequestGen != NULL) in DMA_SetConfig()
1217 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; in DMA_SetConfig()
1221 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in DMA_SetConfig()
1224 hdma->Instance->CNDTR = DataLength; in DMA_SetConfig()
1227 if ((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) in DMA_SetConfig()
1230 hdma->Instance->CPAR = DstAddress; in DMA_SetConfig()
1233 hdma->Instance->CMAR = SrcAddress; in DMA_SetConfig()
1239 hdma->Instance->CPAR = SrcAddress; in DMA_SetConfig()
1242 hdma->Instance->CMAR = DstAddress; in DMA_SetConfig()
1252 static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma) in DMA_CalcDMAMUXChannelBaseAndMask() argument
1257 if ((uint32_t)hdma->Instance < (uint32_t)DMA2_Channel1) in DMA_CalcDMAMUXChannelBaseAndMask()
1261 hdma->DMAmuxChannel = (DMAMUX1_Channel0 + (hdma->ChannelIndex >> 2U)); in DMA_CalcDMAMUXChannelBaseAndMask()
1264 channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U; in DMA_CalcDMAMUXChannelBaseAndMask()
1270 hdma->DMAmuxChannel = (DMAMUX1_Channel7 + (hdma->ChannelIndex >> 2U)); in DMA_CalcDMAMUXChannelBaseAndMask()
1273 channel_number = (((((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U) + 7U); in DMA_CalcDMAMUXChannelBaseAndMask()
1277 hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus; in DMA_CalcDMAMUXChannelBaseAndMask()
1280 hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU); in DMA_CalcDMAMUXChannelBaseAndMask()
1290 static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma) in DMA_CalcDMAMUXRequestGenBaseAndMask() argument
1292 uint32_t request = hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID; in DMA_CalcDMAMUXRequestGenBaseAndMask()
1295 …hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenera… in DMA_CalcDMAMUXRequestGenBaseAndMask()
1297 hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus; in DMA_CalcDMAMUXRequestGenBaseAndMask()
1300 hdma->DMAmuxRequestGenStatusMask = 1UL << ((request - 1U) & 0x3U); in DMA_CalcDMAMUXRequestGenBaseAndMask()