577   uint32_t tmpcr2;  in LL_TIM_HALLSENSOR_Init()  local
592   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in LL_TIM_HALLSENSOR_Init()
604   tmpcr2 |= TIM_CR2_TI1S;  in LL_TIM_HALLSENSOR_Init()
607   tmpcr2 |= LL_TIM_TRGO_OC2REF;  in LL_TIM_HALLSENSOR_Init()
630   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in LL_TIM_HALLSENSOR_Init()
761   uint32_t tmpcr2;  in OC1Config()  local
776   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC1Config()
807     MODIFY_REG(tmpcr2, TIM_CR2_OIS1, TIM_OCInitStruct->OCIdleState);  in OC1Config()
810     MODIFY_REG(tmpcr2, TIM_CR2_OIS1N, TIM_OCInitStruct->OCNIdleState << 1U);  in OC1Config()
814   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC1Config()
840   uint32_t tmpcr2;  in OC2Config()  local
855   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC2Config()
886     MODIFY_REG(tmpcr2, TIM_CR2_OIS2, TIM_OCInitStruct->OCIdleState << 2U);  in OC2Config()
889     MODIFY_REG(tmpcr2, TIM_CR2_OIS2N, TIM_OCInitStruct->OCNIdleState << 3U);  in OC2Config()
893   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC2Config()
919   uint32_t tmpcr2;  in OC3Config()  local
934   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC3Config()
965     MODIFY_REG(tmpcr2, TIM_CR2_OIS3, TIM_OCInitStruct->OCIdleState << 4U);  in OC3Config()
968     MODIFY_REG(tmpcr2, TIM_CR2_OIS3N, TIM_OCInitStruct->OCNIdleState << 5U);  in OC3Config()
972   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC3Config()
998   uint32_t tmpcr2;  in OC4Config()  local
1013   tmpcr2 =  LL_TIM_ReadReg(TIMx, CR2);  in OC4Config()
1035     MODIFY_REG(tmpcr2, TIM_CR2_OIS4, TIM_OCInitStruct->OCIdleState << 6U);  in OC4Config()
1039   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC4Config()