428   MODIFY_REG(SPIx->CR2, SPI_CR2_FRF, Standard);  in LL_SPI_SetStandard()
441   return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF));  in LL_SPI_GetStandard()
629   MODIFY_REG(SPIx->CR2, SPI_CR2_DS, DataWidth);  in LL_SPI_SetDataWidth()
653   return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_DS));  in LL_SPI_GetDataWidth()
667   MODIFY_REG(SPIx->CR2, SPI_CR2_FRXTH, Threshold);  in LL_SPI_SetRxFIFOThreshold()
680   return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRXTH));  in LL_SPI_GetRxFIFOThreshold()
835   MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, ((uint32_t)(NSS >> 16U)));  in LL_SPI_SetNSSMode()
851   uint32_t Ssoe = (READ_BIT(SPIx->CR2,  SPI_CR2_SSOE) << 16U);  in LL_SPI_GetNSSMode()
864   SET_BIT(SPIx->CR2, SPI_CR2_NSSP);  in LL_SPI_EnableNSSPulseMgt()
876   CLEAR_BIT(SPIx->CR2, SPI_CR2_NSSP);  in LL_SPI_DisableNSSPulseMgt()
888   return ((READ_BIT(SPIx->CR2, SPI_CR2_NSSP) == (SPI_CR2_NSSP)) ? 1UL : 0UL);  in LL_SPI_IsEnabledNSSPulse()
1088   SET_BIT(SPIx->CR2, SPI_CR2_ERRIE);  in LL_SPI_EnableIT_ERR()
1099   SET_BIT(SPIx->CR2, SPI_CR2_RXNEIE);  in LL_SPI_EnableIT_RXNE()
1110   SET_BIT(SPIx->CR2, SPI_CR2_TXEIE);  in LL_SPI_EnableIT_TXE()
1122   CLEAR_BIT(SPIx->CR2, SPI_CR2_ERRIE);  in LL_SPI_DisableIT_ERR()
1133   CLEAR_BIT(SPIx->CR2, SPI_CR2_RXNEIE);  in LL_SPI_DisableIT_RXNE()
1144   CLEAR_BIT(SPIx->CR2, SPI_CR2_TXEIE);  in LL_SPI_DisableIT_TXE()
1155   return ((READ_BIT(SPIx->CR2, SPI_CR2_ERRIE) == (SPI_CR2_ERRIE)) ? 1UL : 0UL);  in LL_SPI_IsEnabledIT_ERR()
1166   return ((READ_BIT(SPIx->CR2, SPI_CR2_RXNEIE) == (SPI_CR2_RXNEIE)) ? 1UL : 0UL);  in LL_SPI_IsEnabledIT_RXNE()
1177   return ((READ_BIT(SPIx->CR2, SPI_CR2_TXEIE) == (SPI_CR2_TXEIE)) ? 1UL : 0UL);  in LL_SPI_IsEnabledIT_TXE()
1196   SET_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);  in LL_SPI_EnableDMAReq_RX()
1207   CLEAR_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);  in LL_SPI_DisableDMAReq_RX()
1218   return ((READ_BIT(SPIx->CR2, SPI_CR2_RXDMAEN) == (SPI_CR2_RXDMAEN)) ? 1UL : 0UL);  in LL_SPI_IsEnabledDMAReq_RX()
1229   SET_BIT(SPIx->CR2, SPI_CR2_TXDMAEN);  in LL_SPI_EnableDMAReq_TX()
1240   CLEAR_BIT(SPIx->CR2, SPI_CR2_TXDMAEN);  in LL_SPI_DisableDMAReq_TX()
1251   return ((READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN)) ? 1UL : 0UL);  in LL_SPI_IsEnabledDMAReq_TX()
1265   MODIFY_REG(SPIx->CR2, SPI_CR2_LDMARX, (Parity << SPI_CR2_LDMARX_Pos));  in LL_SPI_SetDMAParity_RX()
1278   return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_LDMARX) >> SPI_CR2_LDMARX_Pos);  in LL_SPI_GetDMAParity_RX()
1292   MODIFY_REG(SPIx->CR2, SPI_CR2_LDMATX, (Parity << SPI_CR2_LDMATX_Pos));  in LL_SPI_SetDMAParity_TX()
1305   return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_LDMATX) >> SPI_CR2_LDMATX_Pos);  in LL_SPI_GetDMAParity_TX()