504 __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_EnableChannel()  argument
506   SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN);  in LL_DMA_EnableChannel()
523 __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_DisableChannel()  argument
525   CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN);  in LL_DMA_DisableChannel()
542 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_IsEnabledChannel()  argument
544   return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR,  in LL_DMA_IsEnabledChannel()
577 __STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configurat…  in LL_DMA_ConfigTransfer()  argument
579   MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR,  in LL_DMA_ConfigTransfer()
603 __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t …  in LL_DMA_SetDataTransferDirection()  argument
605   MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR,  in LL_DMA_SetDataTransferDirection()
627 __STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_GetDataTransferDirection()  argument
629   return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR,  in LL_DMA_GetDataTransferDirection()
652 __STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode)  in LL_DMA_SetMode()  argument
654   MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_CIRC,  in LL_DMA_SetMode()
674 __STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_GetMode()  argument
676   return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR,  in LL_DMA_GetMode()
697 __STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOr…  in LL_DMA_SetPeriphIncMode()  argument
699   MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PINC,  in LL_DMA_SetPeriphIncMode()
719 __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_GetPeriphIncMode()  argument
721   return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR,  in LL_DMA_GetPeriphIncMode()
742 __STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOr…  in LL_DMA_SetMemoryIncMode()  argument
744   MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_MINC,  in LL_DMA_SetMemoryIncMode()
764 __STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_GetMemoryIncMode()  argument
766   return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR,  in LL_DMA_GetMemoryIncMode()
788 __STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2M…  in LL_DMA_SetPeriphSize()  argument
790   MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PSIZE,  in LL_DMA_SetPeriphSize()
811 __STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_GetPeriphSize()  argument
813   return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR,  in LL_DMA_GetPeriphSize()
835 __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2M…  in LL_DMA_SetMemorySize()  argument
837   MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_MSIZE,  in LL_DMA_SetMemorySize()
858 __STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_GetMemorySize()  argument
860   return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR,  in LL_DMA_GetMemorySize()
883 __STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t P…  in LL_DMA_SetChannelPriorityLevel()  argument
885   MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PL,  in LL_DMA_SetChannelPriorityLevel()
907 __STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_GetChannelPriorityLevel()  argument
909   return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR,  in LL_DMA_GetChannelPriorityLevel()
930 __STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData)  in LL_DMA_SetDataLength()  argument
932   MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CNDTR,  in LL_DMA_SetDataLength()
952 __STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_GetDataLength()  argument
954   return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CNDTR,  in LL_DMA_GetDataLength()
981 __STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t SrcAddres…  in LL_DMA_ConfigAddresses()  argument
987     WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, SrcAddress);  in LL_DMA_ConfigAddresses()
988     WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, DstAddress);  in LL_DMA_ConfigAddresses()
993     WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, SrcAddress);  in LL_DMA_ConfigAddresses()
994     WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, DstAddress);  in LL_DMA_ConfigAddresses()
1015 __STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAd…  in LL_DMA_SetMemoryAddress()  argument
1017   WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress);  in LL_DMA_SetMemoryAddress()
1037 __STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAd…  in LL_DMA_SetPeriphAddress()  argument
1039   WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, PeriphAddress);  in LL_DMA_SetPeriphAddress()
1057 __STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_GetMemoryAddress()  argument
1059   return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR));  in LL_DMA_GetMemoryAddress()
1077 __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_GetPeriphAddress()  argument
1079   return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR));  in LL_DMA_GetPeriphAddress()
1099 __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAd…  in LL_DMA_SetM2MSrcAddress()  argument
1101   WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, MemoryAddress);  in LL_DMA_SetM2MSrcAddress()
1121 __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAd…  in LL_DMA_SetM2MDstAddress()  argument
1123   WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress);  in LL_DMA_SetM2MDstAddress()
1141 __STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_GetM2MSrcAddress()  argument
1143   return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR));  in LL_DMA_GetM2MSrcAddress()
1161 __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_GetM2MDstAddress()  argument
1163   return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR));  in LL_DMA_GetM2MDstAddress()
1224 __STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Request)  in LL_DMA_SetPeriphRequest()  argument
1226 …MODIFY_REG(__LL_DMA_INSTANCE_TO_DMAMUX_CCR(DMAx, Channel - 1U)->CCR, DMAMUX_CxCR_DMAREQ_ID, Reques…  in LL_DMA_SetPeriphRequest()
1286 __STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_GetPeriphRequest()  argument
1288 …return (READ_BIT(__LL_DMA_INSTANCE_TO_DMAMUX_CCR(DMAx, Channel - 1U)->CCR, DMAMUX_CxCR_DMAREQ_ID));  in LL_DMA_GetPeriphRequest()
1305 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI1(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_GI1()  argument
1307   return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF1) == (DMA_ISR_GIF1)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_GI1()
1316 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI2(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_GI2()  argument
1318   return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF2) == (DMA_ISR_GIF2)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_GI2()
1327 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI3(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_GI3()  argument
1329   return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF3) == (DMA_ISR_GIF3)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_GI3()
1338 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI4(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_GI4()  argument
1340   return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF4) == (DMA_ISR_GIF4)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_GI4()
1349 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI5(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_GI5()  argument
1351   return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF5) == (DMA_ISR_GIF5)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_GI5()
1360 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI6(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_GI6()  argument
1362   return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF6) == (DMA_ISR_GIF6)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_GI6()
1371 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI7(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_GI7()  argument
1373   return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF7) == (DMA_ISR_GIF7)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_GI7()
1382 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC1(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_TC1()  argument
1384   return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF1) == (DMA_ISR_TCIF1)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_TC1()
1393 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_TC2()  argument
1395   return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF2) == (DMA_ISR_TCIF2)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_TC2()
1404 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC3(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_TC3()  argument
1406   return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF3) == (DMA_ISR_TCIF3)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_TC3()
1415 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_TC4()  argument
1417   return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF4) == (DMA_ISR_TCIF4)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_TC4()
1426 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC5(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_TC5()  argument
1428   return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF5) == (DMA_ISR_TCIF5)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_TC5()
1437 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC6(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_TC6()  argument
1439   return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF6) == (DMA_ISR_TCIF6)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_TC6()
1448 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_TC7()  argument
1450   return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF7) == (DMA_ISR_TCIF7)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_TC7()
1459 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_HT1()  argument
1461   return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF1) == (DMA_ISR_HTIF1)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_HT1()
1470 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_HT2()  argument
1472   return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF2) == (DMA_ISR_HTIF2)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_HT2()
1481 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT3(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_HT3()  argument
1483   return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF3) == (DMA_ISR_HTIF3)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_HT3()
1492 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_HT4()  argument
1494   return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF4) == (DMA_ISR_HTIF4)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_HT4()
1503 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_HT5()  argument
1505   return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF5) == (DMA_ISR_HTIF5)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_HT5()
1514 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_HT6()  argument
1516   return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF6) == (DMA_ISR_HTIF6)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_HT6()
1525 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_HT7()  argument
1527   return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF7) == (DMA_ISR_HTIF7)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_HT7()
1536 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_TE1()  argument
1538   return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF1) == (DMA_ISR_TEIF1)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_TE1()
1547 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_TE2()  argument
1549   return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF2) == (DMA_ISR_TEIF2)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_TE2()
1558 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE3(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_TE3()  argument
1560   return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF3) == (DMA_ISR_TEIF3)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_TE3()
1569 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE4(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_TE4()  argument
1571   return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF4) == (DMA_ISR_TEIF4)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_TE4()
1580 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE5(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_TE5()  argument
1582   return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF5) == (DMA_ISR_TEIF5)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_TE5()
1591 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_TE6()  argument
1593   return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF6) == (DMA_ISR_TEIF6)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_TE6()
1602 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef *DMAx)  in LL_DMA_IsActiveFlag_TE7()  argument
1604   return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF7) == (DMA_ISR_TEIF7)) ? 1UL : 0UL);  in LL_DMA_IsActiveFlag_TE7()
1617 __STATIC_INLINE void LL_DMA_ClearFlag_GI1(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_GI1()  argument
1619   WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1);  in LL_DMA_ClearFlag_GI1()
1632 __STATIC_INLINE void LL_DMA_ClearFlag_GI2(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_GI2()  argument
1634   WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2);  in LL_DMA_ClearFlag_GI2()
1647 __STATIC_INLINE void LL_DMA_ClearFlag_GI3(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_GI3()  argument
1649   WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3);  in LL_DMA_ClearFlag_GI3()
1662 __STATIC_INLINE void LL_DMA_ClearFlag_GI4(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_GI4()  argument
1664   WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4);  in LL_DMA_ClearFlag_GI4()
1677 __STATIC_INLINE void LL_DMA_ClearFlag_GI5(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_GI5()  argument
1679   WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5);  in LL_DMA_ClearFlag_GI5()
1692 __STATIC_INLINE void LL_DMA_ClearFlag_GI6(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_GI6()  argument
1694   WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6);  in LL_DMA_ClearFlag_GI6()
1707 __STATIC_INLINE void LL_DMA_ClearFlag_GI7(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_GI7()  argument
1709   WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7);  in LL_DMA_ClearFlag_GI7()
1718 __STATIC_INLINE void LL_DMA_ClearFlag_TC1(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_TC1()  argument
1720   WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1);  in LL_DMA_ClearFlag_TC1()
1729 __STATIC_INLINE void LL_DMA_ClearFlag_TC2(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_TC2()  argument
1731   WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2);  in LL_DMA_ClearFlag_TC2()
1740 __STATIC_INLINE void LL_DMA_ClearFlag_TC3(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_TC3()  argument
1742   WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF3);  in LL_DMA_ClearFlag_TC3()
1751 __STATIC_INLINE void LL_DMA_ClearFlag_TC4(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_TC4()  argument
1753   WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF4);  in LL_DMA_ClearFlag_TC4()
1762 __STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_TC5()  argument
1764   WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF5);  in LL_DMA_ClearFlag_TC5()
1773 __STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_TC6()  argument
1775   WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF6);  in LL_DMA_ClearFlag_TC6()
1784 __STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_TC7()  argument
1786   WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF7);  in LL_DMA_ClearFlag_TC7()
1795 __STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_HT1()  argument
1797   WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF1);  in LL_DMA_ClearFlag_HT1()
1806 __STATIC_INLINE void LL_DMA_ClearFlag_HT2(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_HT2()  argument
1808   WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF2);  in LL_DMA_ClearFlag_HT2()
1817 __STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_HT3()  argument
1819   WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF3);  in LL_DMA_ClearFlag_HT3()
1828 __STATIC_INLINE void LL_DMA_ClearFlag_HT4(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_HT4()  argument
1830   WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF4);  in LL_DMA_ClearFlag_HT4()
1839 __STATIC_INLINE void LL_DMA_ClearFlag_HT5(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_HT5()  argument
1841   WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF5);  in LL_DMA_ClearFlag_HT5()
1850 __STATIC_INLINE void LL_DMA_ClearFlag_HT6(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_HT6()  argument
1852   WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF6);  in LL_DMA_ClearFlag_HT6()
1861 __STATIC_INLINE void LL_DMA_ClearFlag_HT7(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_HT7()  argument
1863   WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF7);  in LL_DMA_ClearFlag_HT7()
1872 __STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_TE1()  argument
1874   WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF1);  in LL_DMA_ClearFlag_TE1()
1883 __STATIC_INLINE void LL_DMA_ClearFlag_TE2(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_TE2()  argument
1885   WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF2);  in LL_DMA_ClearFlag_TE2()
1894 __STATIC_INLINE void LL_DMA_ClearFlag_TE3(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_TE3()  argument
1896   WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF3);  in LL_DMA_ClearFlag_TE3()
1905 __STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_TE4()  argument
1907   WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF4);  in LL_DMA_ClearFlag_TE4()
1916 __STATIC_INLINE void LL_DMA_ClearFlag_TE5(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_TE5()  argument
1918   WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF5);  in LL_DMA_ClearFlag_TE5()
1927 __STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_TE6()  argument
1929   WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF6);  in LL_DMA_ClearFlag_TE6()
1938 __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx)  in LL_DMA_ClearFlag_TE7()  argument
1940   WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF7);  in LL_DMA_ClearFlag_TE7()
1964 __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_EnableIT_TC()  argument
1966   SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE);  in LL_DMA_EnableIT_TC()
1983 __STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_EnableIT_HT()  argument
1985   SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE);  in LL_DMA_EnableIT_HT()
2002 __STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_EnableIT_TE()  argument
2004   SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TEIE);  in LL_DMA_EnableIT_TE()
2021 __STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_DisableIT_TC()  argument
2023   CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE);  in LL_DMA_DisableIT_TC()
2040 __STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_DisableIT_HT()  argument
2042   CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE);  in LL_DMA_DisableIT_HT()
2059 __STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_DisableIT_TE()  argument
2061   CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TEIE);  in LL_DMA_DisableIT_TE()
2078 __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_IsEnabledIT_TC()  argument
2080   return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR,  in LL_DMA_IsEnabledIT_TC()
2098 __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_IsEnabledIT_HT()  argument
2100   return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR,  in LL_DMA_IsEnabledIT_HT()
2118 __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)  in LL_DMA_IsEnabledIT_TE()  argument
2120   return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR,  in LL_DMA_IsEnabledIT_TE()
2132 ErrorStatus LL_DMA_Init(DMA_TypeDef *DMAx, uint32_t Channel, LL_DMA_InitTypeDef *DMA_InitStruct);
2133 ErrorStatus LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Channel);