1440   uint32_t regvalue;  in HAL_RCC_GetOscConfig()  local
1451   regvalue = RCC->BDCR1;  in HAL_RCC_GetOscConfig()
1455   RCC_OscInitStruct->LSEState = (regvalue & mask);  in HAL_RCC_GetOscConfig()
1462   RCC_OscInitStruct->LSIState = (regvalue & mask);  in HAL_RCC_GetOscConfig()
1463   RCC_OscInitStruct->LSIDiv = (regvalue & RCC_BDCR1_LSI1PREDIV);  in HAL_RCC_GetOscConfig()
1466   regvalue = RCC->CR;  in HAL_RCC_GetOscConfig()
1469   RCC_OscInitStruct->HSEState = (regvalue & RCC_CR_HSEON);  in HAL_RCC_GetOscConfig()
1470   RCC_OscInitStruct->HSEDiv = (regvalue & RCC_CR_HSEPRE);  in HAL_RCC_GetOscConfig()
1473   RCC_OscInitStruct->HSIState = (regvalue & RCC_CR_HSION);  in HAL_RCC_GetOscConfig()
1477   if ((regvalue & RCC_CR_PLL1ON) != 0x00u)  in HAL_RCC_GetOscConfig()
1487   regvalue = RCC->PLL1CFGR;  in HAL_RCC_GetOscConfig()
1488   RCC_OscInitStruct->PLL1.PLLSource = (regvalue & RCC_PLL1CFGR_PLL1SRC);  in HAL_RCC_GetOscConfig()
1489   RCC_OscInitStruct->PLL1.PLLM = (((regvalue & RCC_PLL1CFGR_PLL1M) >> RCC_PLL1CFGR_PLL1M_Pos) + 1U);  in HAL_RCC_GetOscConfig()
1492   if ((regvalue & RCC_PLL1CFGR_PLL1FRACEN) != 0x00u)  in HAL_RCC_GetOscConfig()
1494     regvalue = (((RCC->PLL1FRACR & RCC_PLL1FRACR_PLL1FRACN) >> RCC_PLL1FRACR_PLL1FRACN_Pos));  in HAL_RCC_GetOscConfig()
1498     regvalue = 0;  in HAL_RCC_GetOscConfig()
1500   RCC_OscInitStruct->PLL1.PLLFractional = regvalue;  in HAL_RCC_GetOscConfig()
1503   regvalue = RCC->PLL1DIVR;  in HAL_RCC_GetOscConfig()
1504   RCC_OscInitStruct->PLL1.PLLN = ((regvalue & RCC_PLL1DIVR_PLL1N) + 1U);  in HAL_RCC_GetOscConfig()
1505   RCC_OscInitStruct->PLL1.PLLQ = (((regvalue & RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) + 1U);  in HAL_RCC_GetOscConfig()
1506   RCC_OscInitStruct->PLL1.PLLR = (((regvalue & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U);  in HAL_RCC_GetOscConfig()
1507   RCC_OscInitStruct->PLL1.PLLP = (((regvalue & RCC_PLL1DIVR_PLL1P) >> RCC_PLL1DIVR_PLL1P_Pos) + 1U);  in HAL_RCC_GetOscConfig()