535        &&  !(IS_GTZC_BASE_ADDRESS(SRAM2, MemBaseAddress))  in HAL_GTZC_MPCBB_ConfigMem()
558   else if (IS_GTZC_BASE_ADDRESS(SRAM2, MemBaseAddress))  in HAL_GTZC_MPCBB_ConfigMem()
561     mem_size = GTZC_MEM_SIZE(SRAM2);  in HAL_GTZC_MPCBB_ConfigMem()
616       && !(IS_GTZC_BASE_ADDRESS(SRAM2, MemBaseAddress))  in HAL_GTZC_MPCBB_GetConfigMem()
629   else if (IS_GTZC_BASE_ADDRESS(SRAM2, MemBaseAddress))  in HAL_GTZC_MPCBB_GetConfigMem()
632     mem_size = GTZC_MEM_SIZE(SRAM2);  in HAL_GTZC_MPCBB_GetConfigMem()
714   else if (((IS_ADDRESS_IN_NS(SRAM2, MemAddress))  in HAL_GTZC_MPCBB_ConfigMemAttributes()
715             && (IS_ADDRESS_IN_NS(SRAM2, end_address))) != 0U)  in HAL_GTZC_MPCBB_ConfigMemAttributes()
721   else if (((IS_ADDRESS_IN_S(SRAM2, MemAddress))  in HAL_GTZC_MPCBB_ConfigMemAttributes()
722             && (IS_ADDRESS_IN_S(SRAM2, end_address))) != 0U)  in HAL_GTZC_MPCBB_ConfigMemAttributes()
859   else if ((IS_ADDRESS_IN_NS(SRAM2, MemAddress))  in HAL_GTZC_MPCBB_GetConfigMemAttributes()
860            && (IS_ADDRESS_IN_NS(SRAM2, end_address)))  in HAL_GTZC_MPCBB_GetConfigMemAttributes()
866   else if ((IS_ADDRESS_IN_S(SRAM2, MemAddress))  in HAL_GTZC_MPCBB_GetConfigMemAttributes()
867            && (IS_ADDRESS_IN_S(SRAM2, end_address)))  in HAL_GTZC_MPCBB_GetConfigMemAttributes()
956   else if ((IS_ADDRESS_IN(SRAM2, MemAddress))  in HAL_GTZC_MPCBB_LockConfig()
957            && (IS_ADDRESS_IN(SRAM2, (MemAddress  in HAL_GTZC_MPCBB_LockConfig()
961     base_address = GTZC_BASE_ADDRESS(SRAM2);  in HAL_GTZC_MPCBB_LockConfig()
1049   else if ((IS_ADDRESS_IN(SRAM2, MemAddress))  in HAL_GTZC_MPCBB_GetLockConfig()
1050            && (IS_ADDRESS_IN(SRAM2, (MemAddress  in HAL_GTZC_MPCBB_GetLockConfig()
1055     base_address = GTZC_BASE_ADDRESS(SRAM2);  in HAL_GTZC_MPCBB_GetLockConfig()
1101   else if (IS_GTZC_BASE_ADDRESS(SRAM2, MemBaseAddress))  in HAL_GTZC_MPCBB_Lock()
1131   else if (IS_GTZC_BASE_ADDRESS(SRAM2, MemBaseAddress))  in HAL_GTZC_MPCBB_GetLock()