514   SET_BIT(I2Cx->CR1, I2C_CR1_PE);  in LL_I2C_Enable()
528   CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);  in LL_I2C_Disable()
539   return ((READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE)) ? 1UL : 0UL);  in LL_I2C_IsEnabled()
560 …MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF | I2C_CR1_DNF, AnalogFilter | (DigitalFilter << I2C_CR1_DNF_P…  in LL_I2C_ConfigFilters()
577   MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos);  in LL_I2C_SetDigitalFilter()
588   return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_DNF) >> I2C_CR1_DNF_Pos);  in LL_I2C_GetDigitalFilter()
600   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);  in LL_I2C_EnableAnalogFilter()
612   SET_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);  in LL_I2C_DisableAnalogFilter()
623   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF)) ? 1UL : 0UL);  in LL_I2C_IsEnabledAnalogFilter()
634   SET_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);  in LL_I2C_EnableDMAReq_TX()
645   CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);  in LL_I2C_DisableDMAReq_TX()
656   return ((READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledDMAReq_TX()
667   SET_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);  in LL_I2C_EnableDMAReq_RX()
678   CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);  in LL_I2C_DisableDMAReq_RX()
689   return ((READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledDMAReq_RX()
729   CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);  in LL_I2C_EnableClockStretching()
741   SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);  in LL_I2C_DisableClockStretching()
752   return ((READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH)) ? 1UL : 0UL);  in LL_I2C_IsEnabledClockStretching()
763   SET_BIT(I2Cx->CR1, I2C_CR1_SBC);  in LL_I2C_EnableSlaveByteControl()
774   CLEAR_BIT(I2Cx->CR1, I2C_CR1_SBC);  in LL_I2C_DisableSlaveByteControl()
785   return ((READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC)) ? 1UL : 0UL);  in LL_I2C_IsEnabledSlaveByteControl()
799   SET_BIT(I2Cx->CR1, I2C_CR1_WUPEN);  in LL_I2C_EnableWakeUpFromStop()
812   CLEAR_BIT(I2Cx->CR1, I2C_CR1_WUPEN);  in LL_I2C_DisableWakeUpFromStop()
825   return ((READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledWakeUpFromStop()
837   SET_BIT(I2Cx->CR1, I2C_CR1_GCEN);  in LL_I2C_EnableGeneralCall()
849   CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);  in LL_I2C_DisableGeneralCall()
860   return ((READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledGeneralCall()
872   SET_BIT(I2Cx->CR1, I2C_CR1_FMP);  in LL_I2C_EnableFastModePlus()
884   CLEAR_BIT(I2Cx->CR1, I2C_CR1_FMP);  in LL_I2C_DisableFastModePlus()
895   return ((READ_BIT(I2Cx->CR1, I2C_CR1_FMP) == (I2C_CR1_FMP)) ? 1UL : 0UL);  in LL_I2C_IsEnabledFastModePlus()
906   SET_BIT(I2Cx->CR1, I2C_CR1_ADDRACLR);  in LL_I2C_EnableAutoClearFlag_ADDR()
917   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRACLR);  in LL_I2C_DisableAutoClearFlag_ADDR()
928   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRACLR) == (I2C_CR1_ADDRACLR)) ? 1UL : 0UL);  in LL_I2C_IsEnabledAutoClearFlag_ADDR()
939   SET_BIT(I2Cx->CR1, I2C_CR1_STOPFACLR);  in LL_I2C_EnableAutoClearFlag_STOP()
950   CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPFACLR);  in LL_I2C_DisableAutoClearFlag_STOP()
961   return ((READ_BIT(I2Cx->CR1, I2C_CR1_STOPFACLR) == (I2C_CR1_STOPFACLR)) ? 1UL : 0UL);  in LL_I2C_IsEnabledAutoClearFlag_STOP()
1182   MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN, PeripheralMode);  in LL_I2C_SetMode()
1200   return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN));  in LL_I2C_GetMode()
1218   SET_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);  in LL_I2C_EnableSMBusAlert()
1236   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);  in LL_I2C_DisableSMBusAlert()
1249   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledSMBusAlert()
1262   SET_BIT(I2Cx->CR1, I2C_CR1_PECEN);  in LL_I2C_EnableSMBusPEC()
1275   CLEAR_BIT(I2Cx->CR1, I2C_CR1_PECEN);  in LL_I2C_DisableSMBusPEC()
1288   return ((READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledSMBusPEC()
1473   SET_BIT(I2Cx->CR1, I2C_CR1_TXIE);  in LL_I2C_EnableIT_TX()
1484   CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXIE);  in LL_I2C_DisableIT_TX()
1495   return ((READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_TX()
1506   SET_BIT(I2Cx->CR1, I2C_CR1_RXIE);  in LL_I2C_EnableIT_RX()
1517   CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXIE);  in LL_I2C_DisableIT_RX()
1528   return ((READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_RX()
1539   SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);  in LL_I2C_EnableIT_ADDR()
1550   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);  in LL_I2C_DisableIT_ADDR()
1561   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_ADDR()
1572   SET_BIT(I2Cx->CR1, I2C_CR1_NACKIE);  in LL_I2C_EnableIT_NACK()
1583   CLEAR_BIT(I2Cx->CR1, I2C_CR1_NACKIE);  in LL_I2C_DisableIT_NACK()
1594   return ((READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_NACK()
1605   SET_BIT(I2Cx->CR1, I2C_CR1_STOPIE);  in LL_I2C_EnableIT_STOP()
1616   CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPIE);  in LL_I2C_DisableIT_STOP()
1627   return ((READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_STOP()
1641   SET_BIT(I2Cx->CR1, I2C_CR1_TCIE);  in LL_I2C_EnableIT_TC()
1655   CLEAR_BIT(I2Cx->CR1, I2C_CR1_TCIE);  in LL_I2C_DisableIT_TC()
1666   return ((READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_TC()
1686   SET_BIT(I2Cx->CR1, I2C_CR1_ERRIE);  in LL_I2C_EnableIT_ERR()
1706   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ERRIE);  in LL_I2C_DisableIT_ERR()
1717   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_ERR()