498 __STATIC_INLINE void LL_HSEM_EnableIT_IER(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)  in LL_HSEM_EnableIT_IER()  argument
501   SET_BIT(HSEMx->SIER, SemaphoreMask);  in LL_HSEM_EnableIT_IER()
503   SET_BIT(HSEMx->IER, SemaphoreMask);  in LL_HSEM_EnableIT_IER()
531 __STATIC_INLINE void LL_HSEM_DisableIT_IER(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)  in LL_HSEM_DisableIT_IER()  argument
534   CLEAR_BIT(HSEMx->SIER, SemaphoreMask);  in LL_HSEM_DisableIT_IER()
536   CLEAR_BIT(HSEMx->IER, SemaphoreMask);  in LL_HSEM_DisableIT_IER()
564 __STATIC_INLINE uint32_t LL_HSEM_IsEnabledIT_IER(const HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)  in LL_HSEM_IsEnabledIT_IER()  argument
567   return ((READ_BIT(HSEMx->SIER, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);  in LL_HSEM_IsEnabledIT_IER()
569   return ((READ_BIT(HSEMx->IER, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);  in LL_HSEM_IsEnabledIT_IER()
606 __STATIC_INLINE void LL_HSEM_ClearFlag_ICR(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)  in LL_HSEM_ClearFlag_ICR()  argument
609   WRITE_REG(HSEMx->SICR, SemaphoreMask);  in LL_HSEM_ClearFlag_ICR()
611   WRITE_REG(HSEMx->ICR, SemaphoreMask);  in LL_HSEM_ClearFlag_ICR()
639 __STATIC_INLINE uint32_t LL_HSEM_IsActiveFlag_ISR(const HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)  in LL_HSEM_IsActiveFlag_ISR()  argument
642   return ((READ_BIT(HSEMx->SISR, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);  in LL_HSEM_IsActiveFlag_ISR()
644   return ((READ_BIT(HSEMx->ISR, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);  in LL_HSEM_IsActiveFlag_ISR()
672 …STATIC_INLINE uint32_t LL_HSEM_IsActiveFlag_MISR(const HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)  in LL_HSEM_IsActiveFlag_MISR()  argument
675   return ((READ_BIT(HSEMx->SMISR, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);  in LL_HSEM_IsActiveFlag_MISR()
677   return ((READ_BIT(HSEMx->MISR, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);  in LL_HSEM_IsActiveFlag_MISR()