Lines Matching full:with
14 * If no LICENSE file comes with this software, it is provided AS-IS.
71 … compatibility with some ADC on other STM32 series
75 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
83 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
104 ADC_CHANNEL_ID_NUMBER_MASK with reduced range: on this STM32 series, ADC group regular sequencer,
105 if set to mode "fully configurable", can contain channels with a restricted channel number.
247 … | ADC_CR_ADSTART | ADC_CR_ADSTP) /* ADC register CR bits with
258 with which VrefInt has been calibrated in production
274 … with which temperature sensor has been calibrated in production
288 * @brief Driver macro reserved for internal use: isolate bits with the
350 * (setting possible with ADC enabled without conversion on going,
351 * ADC enabled with conversion on going, ...)
352 * Each feature can be updated afterwards with a unitary function
353 * and potentially with ADC in a different state than disabled,
377 * (functions with prefix "REG").
384 * (setting possible with ADC enabled without conversion on going,
385 * ADC enabled with conversion on going, ...)
386 * Each feature can be updated afterwards with a unitary function
387 * and potentially with ADC in a different state than disabled,
398 … with some ADC on other STM32 series having this setting set by HW
458 * @brief Flags defines which can be used with LL_ADC_ReadReg function
478 * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
498 /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
501 /* List of ADC registers intended to be used (most commonly) with */
505 … (corresponding to register DR) to be used with ADC configured in independent
518 …DC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
521 …DC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
524 …DC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
527 …DC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2) /*!< ADC asynchronous clock with
530 …DC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
533 …DC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
537 … | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
540 …DC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /*!< ADC asynchronous clock with
543 …DC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
546 …DC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
550 … | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
602 … See description with function @ref LL_ADC_SetLPModeAutoWait(). */
606 /* Definitions for backward compatibility with legacy STM32 series */
617 … when a new ADC conversion is triggered (with startup time between trigger
618 and start of sampling). See description with function
620 It can be combined with mode low power mode auto wait. */
775 … This ADC mode is intended to be used with DMA mode non-circular. */
779 … This ADC mode is intended to be used with DMA mode circular. */
815 with 2 ranks in the sequence */
817 with 3 ranks in the sequence */
819 with 4 ranks in the sequence */
821 with 5 ranks in the sequence */
823 with 6 ranks in the sequence */
825 with 7 ranks in the sequence */
827 with 8 ranks in the sequence */
839 … (scan of all ranks, ADC conversion of ranks with channels enabled in
846 … (scan of all ranks, ADC conversion of ranks with channels enabled in
858 … discontinuous mode enable with sequence interruption every rank */
995 … with other STM32 devices featuring ADC group injected, in this case other
1201 * number is returned, either defined with number
1202 * or with bitfield (only one bit must be set).
1261 * comparison with internal channel parameter to be done
1283 * number in ADC registers. The differentiation is made only with
1371 * number in ADC registers. The differentiation is made only with
1388 * define a single channel to monitor with analog watchdog
1390 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1415 * comparison with internal channel parameter to be done
1445 * @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
1447 * Example, with a ADC resolution of 8 bits, to set the value of
1468 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1469 * Example, with a ADC resolution of 8 bits, to get the value of
1489 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1507 * - Multimode (for devices with several ADC instances)
1518 * @note This check is required by functions with setting conditioned to
1522 * @note On devices with only 1 ADC common instance, parameter of this macro
1524 * with devices featuring several ADC common instances).
1608 * On devices with small package, the pin Vref+ is not present
1642 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1705 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1712 * of the current device has characteristics in line with
1786 * intended to be used (most commonly) with DMA transfer.
1790 * @note This macro is intended to be used with LL DMA driver, refer to
1798 * @note For devices with several ADC: in multimode, some devices
1831 * This check can be done with function @ref LL_ADC_IsEnabled() for each
1904 * This check can be done with function @ref LL_ADC_IsEnabled() for each
1944 * This check can be done with function @ref LL_ADC_IsEnabled() for each
1972 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2020 * or differential (for devices with differential mode available).
2042 * or differential (for devices with differential mode available).
2144 * - It is not recommended to use with interruption or DMA
2150 * - Do use with polling: 1. Start conversion,
2155 * @note With ADC low power mode "auto wait", the ADC conversion data read
2193 * - It is not recommended to use with interruption or DMA
2199 * - Do use with polling: 1. Start conversion,
2204 * @note With ADC low power mode "auto wait", the ADC conversion data read
2221 /* Definitions for backward compatibility with legacy STM32 series */
2231 * (with startup time between trigger and start of sampling).
2232 * This feature can be combined with low power mode "auto wait".
2254 * (with startup time between trigger and start of sampling).
2255 * This feature can be combined with low power mode "auto wait".
2308 * @note Usage of ADC trigger frequency mode with ADC low power mode:
2436 * (default setting for compatibility with some ADC on other
2499 /* to match with triggers literals definition. */ in LL_ADC_REG_GetTriggerSource()
2617 * - For devices with sequencer fully configurable
2627 * - For devices with sequencer not fully configurable
2681 * - For devices with sequencer fully configurable
2691 * - For devices with sequencer not fully configurable
2894 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_REG_SetSequencerRanks()
2896 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_REG_SetSequencerRanks()
2917 * with parts of literals LL_ADC_CHANNEL_x or using
2922 * process the returned value with the helper macro
2962 * comparison with internal channel parameter to be done
2987 * This function can be used with setting "not fully configurable".
3044 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChannels()
3062 * This function can be used with setting "not fully configurable".
3119 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChAdd()
3137 * This function can be used with setting "not fully configurable".
3194 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChRem()
3210 * This function can be used with setting "not fully configurable".
3332 * This ADC mode is intended to be used with DMA mode non-circular.
3336 * This ADC mode is intended to be used with DMA mode circular.
3370 * This ADC mode is intended to be used with DMA mode non-circular.
3374 * This ADC mode is intended to be used with DMA mode circular.
3398 * @note Compatibility with devices without feature overrun:
3402 * Therefore, for compatibility with all devices, parameter
3510 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
3599 * with analog watchdog from sequencer channel definition,
3637 /* Set bits with content of parameter "AWDChannelGroup" with bits position */ in LL_ADC_SetAnalogWDMonitChannels()
3639 /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */ in LL_ADC_SetAnalogWDMonitChannels()
3664 * with parts of literals LL_ADC_CHANNEL_x or using
3669 * process the returned value with the helper macro
3811 /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */ in LL_ADC_ConfigAnalogWDThresholds()
3814 /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */ in LL_ADC_ConfigAnalogWDThresholds()
3852 * ADC can be disabled, enabled with or without conversion on going
3874 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_SetAnalogWDThresholds()
3877 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_SetAnalogWDThresholds()
3892 * threshold low or raw data with ADC thresholds high and low
3894 * @note If raw data with ADC thresholds high and low is retrieved,
3921 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_GetAnalogWDThresholds()
3924 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_GetAnalogWDThresholds()
4127 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableInternalRegulator()
4129 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableInternalRegulator()
4178 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Enable()
4180 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Enable()
4198 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Disable()
4200 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Disable()
4233 * or differential (for devices with differential mode available).
4237 * @note In case of usage of ADC with DMA transfer:
4261 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_StartCalibration()
4263 /* to not interfere with bits with HW property "rs". */ in LL_ADC_StartCalibration()
4308 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StartConversion()
4310 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StartConversion()
4320 * ADC must be enabled (potentially with conversion on going on group regular),
4328 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StopConversion()
4330 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StopConversion()
4374 * @note For devices with feature oversampling: Oversampling
4389 * @note For devices with feature oversampling: Oversampling
4404 * @note For devices with feature oversampling: Oversampling
4419 * @note For devices with feature oversampling: Oversampling