Lines Matching refs:BDCR1
1743 #define __HAL_RCC_BACKUPRESET_FORCE() SET_BIT(RCC->BDCR1, RCC_BDCR1_BDRST)
1744 #define __HAL_RCC_BACKUPRESET_RELEASE() CLEAR_BIT(RCC->BDCR1, RCC_BDCR1_BDRST)
1805 #define __HAL_RCC_LSI1_ENABLE() SET_BIT(RCC->BDCR1, RCC_BDCR1_LSI1ON)
1806 #define __HAL_RCC_LSI1_DISABLE() CLEAR_BIT(RCC->BDCR1, RCC_BDCR1_LSI1ON)
1818 #define __HAL_RCC_LSI_DIV_CONFIG(__DIVIDER__) MODIFY_REG(RCC->BDCR1, RCC_BDCR1_LSI1PREDIV, __DI…
1832 #define __HAL_RCC_LSI2_ENABLE() SET_BIT(RCC->BDCR1, RCC_BDCR1_LSI2ON)
1833 #define __HAL_RCC_LSI2_DISABLE() CLEAR_BIT(RCC->BDCR1, RCC_BDCR1_LSI2ON)
1866 #define __HAL_RCC_LSESYS_ENABLE() SET_BIT(RCC->BDCR1,RCC_BDCR1_LSESYSEN)
1867 #define __HAL_RCC_LSESYS_DISABLE() CLEAR_BIT(RCC->BDCR1,RCC_BDCR1_LSESYSEN)
1875 #define __HAL_RCC_LSE_GlitchFilter_ENABLE() SET_BIT(RCC->BDCR1, RCC_BDCR1_LSEGFON )
1876 #define __HAL_RCC_LSE_GlitchFilter_DISABLE() CLEAR_BIT(RCC->BDCR1, RCC_BDCR1_LSEGFON )
1903 … SET_BIT(RCC->BDCR1, RCC_BDCR1_LSEON); \
1907 … SET_BIT(RCC->BDCR1, (RCC_BDCR1_LSEON | RCC_BDCR1_LSESYSEN)); \
1911 … SET_BIT(RCC->BDCR1, RCC_BDCR1_LSEBYP); \
1912 … SET_BIT(RCC->BDCR1, (RCC_BDCR1_LSEON | RCC_BDCR1_LSESYSEN)); \
1916 … SET_BIT(RCC->BDCR1, RCC_BDCR1_LSEBYP); \
1917 … SET_BIT(RCC->BDCR1, RCC_BDCR1_LSEON); \
1921 … CLEAR_BIT(RCC->BDCR1, (RCC_BDCR1_LSEON | RCC_BDCR1_LSESYSEN)); \
1922 … CLEAR_BIT(RCC->BDCR1, RCC_BDCR1_LSEBYP); \
1952 MODIFY_REG(RCC->BDCR1, RCC_BDCR1_RTCSEL, (__RTC_CLKSOURCE__))
1962 #define __HAL_RCC_GET_RTC_SOURCE() READ_BIT(RCC->BDCR1, RCC_BDCR1_RTCSEL)
2120 #define __HAL_RCC_LSEDRIVE_CONFIG(__LSEDRIVE__) MODIFY_REG(RCC->BDCR1, RCC_BDCR1_LSEDRV, (__LSEDRIV…
2291 … ((((__FLAG__) >> 5U) == 2U) ? RCC->BDCR1 : \