Lines Matching refs:tmpcr2
681 uint32_t tmpcr2; in OC1Config() local
696 tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); in OC1Config()
727 MODIFY_REG(tmpcr2, TIM_CR2_OIS1, TIM_OCInitStruct->OCIdleState); in OC1Config()
730 MODIFY_REG(tmpcr2, TIM_CR2_OIS1N, TIM_OCInitStruct->OCNIdleState << 1U); in OC1Config()
734 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
760 uint32_t tmpcr2; in OC2Config() local
775 tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); in OC2Config()
807 MODIFY_REG(tmpcr2, TIM_CR2_OIS2, TIM_OCInitStruct->OCIdleState << 2U); in OC2Config()
810 MODIFY_REG(tmpcr2, TIM_CR2_OIS2N, TIM_OCInitStruct->OCNIdleState << 3U); in OC2Config()
815 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC2Config()
841 uint32_t tmpcr2; in OC3Config() local
856 tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); in OC3Config()
888 MODIFY_REG(tmpcr2, TIM_CR2_OIS3, TIM_OCInitStruct->OCIdleState << 4U); in OC3Config()
891 MODIFY_REG(tmpcr2, TIM_CR2_OIS3N, TIM_OCInitStruct->OCNIdleState << 5U); in OC3Config()
896 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC3Config()
922 uint32_t tmpcr2; in OC4Config() local
937 tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); in OC4Config()
960 MODIFY_REG(tmpcr2, TIM_CR2_OIS4, TIM_OCInitStruct->OCIdleState << 6U); in OC4Config()
965 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC4Config()