654   CLEAR_BIT(RCC->CFGR, RCC_CFGR_STOPHSI);  in LL_RCC_HSI_Enable()
655   CLEAR_BIT(RCC->CFGR, RCC_CFGR_HSESEL);  in LL_RCC_HSI_Enable()
665   SET_BIT(RCC->CFGR, RCC_CFGR_HSESEL);  in LL_RCC_HSI_Disable()
666   SET_BIT(RCC->CFGR, RCC_CFGR_STOPHSI);  in LL_RCC_HSI_Disable()
725   SET_BIT(RCC->CFGR, RCC_CFGR_HSESEL);  in LL_RCC_DIRECT_HSE_Enable()
730   SET_BIT(RCC->CFGR, RCC_CFGR_STOPHSI);  in LL_RCC_DIRECT_HSE_Enable()
740   CLEAR_BIT(RCC->CFGR, RCC_CFGR_STOPHSI);  in LL_RCC_DIRECT_HSE_Disable()
742   CLEAR_BIT(RCC->CFGR, RCC_CFGR_HSESEL);  in LL_RCC_DIRECT_HSE_Disable()
753   return ((READ_BIT(RCC->CFGR, RCC_CFGR_HSESEL_STATUS) == (RCC_CFGR_HSESEL_STATUS)) ? 1UL : 0UL);  in LL_RCC_DIRECT_HSE_IsEnabled()
755 …return (((READ_BIT(RCC->CFGR, RCC_CFGR_HSESEL) == (RCC_CFGR_HSESEL)) && (READ_BIT(RCC->CFGR, RCC_C…  in LL_RCC_DIRECT_HSE_IsEnabled()
767   return ((READ_BIT(RCC->CFGR, RCC_CFGR_HSESEL_STATUS) == (RCC_CFGR_HSESEL_STATUS)) ? 1UL : 0UL);  in LL_RCC_Get_DIRECT_HSESEL_Status()
835   MODIFY_REG(RCC->CFGR, RCC_CFGR_CLKSLOWSEL, Source);  in LL_RCC_LSCO_SetSource()
848   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_CLKSLOWSEL));  in LL_RCC_LSCO_GetSource()
1182   MODIFY_REG(RCC->CFGR, RCC_CFGR_SMPSDIV, Prescaler);  in LL_RCC_SetSMPSPrescaler()
1194   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SMPSDIV));  in LL_RCC_GetSMPSPrescaler()
1216   MODIFY_REG(RCC->CFGR, RCC_CFGR_LPUCLKSEL, Source);  in LL_RCC_SetLPUARTClockSource()
1228   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_LPUCLKSEL));  in LL_RCC_GetLPUARTClockSource()
1264   MODIFY_REG(RCC->CFGR, RCC_CFGR_MCOSEL | RCC_CFGR_CCOPRE, MCOSource | MCOPrescaler);  in LL_RCC_ConfigMCO()
1278   MODIFY_REG(RCC->CFGR, RCC_CFGR_LCOSEL, LSCOSource);  in LL_RCC_ConfigLSCO()
1289   SET_BIT(RCC->CFGR, RCC_CFGR_LCOEN);  in LL_RCC_LSCOinDeepStop_Enable()
1299   CLEAR_BIT(RCC->CFGR, RCC_CFGR_LCOEN);  in LL_RCC_LSCOinDeepStop_Disable()
1309   return ((READ_BIT(RCC->CFGR, RCC_CFGR_LCOEN) == (RCC_CFGR_LCOEN)) ? 1UL : 0UL);  in LL_RCC_LSCOinDeepStop_IsEnabled()
1328   SET_BIT(RCC->CFGR, RCC_CFGR_IOBOOSTEN);  in LL_RCC_IOBOOST_Enable()
1338   CLEAR_BIT(RCC->CFGR, RCC_CFGR_IOBOOSTEN);  in LL_RCC_IOBOOST_Disable()
1348   return ((READ_BIT(RCC->CFGR, RCC_CFGR_IOBOOSTEN) == (RCC_CFGR_IOBOOSTEN)) ? 1UL : 0UL);  in LL_RCC_IOBOOST_IsEnabled()
1368   SET_BIT(RCC->CFGR, RCC_CFGR_IOBOOSTCLKEN);  in LL_RCC_IOBOOSTCLK_Enable()
1378   CLEAR_BIT(RCC->CFGR, RCC_CFGR_IOBOOSTCLKEN);  in LL_RCC_IOBOOSTCLK_Disable()
1388   return ((READ_BIT(RCC->CFGR, RCC_CFGR_IOBOOSTCLKEN) == (RCC_CFGR_IOBOOSTCLKEN)) ? 1UL : 0UL);  in LL_RCC_IOBOOSTCLK_IsEnabled()
1411   MODIFY_REG(RCC->CFGR, RCC_CFGR_SPI2I2SCLKSEL, Source);  in LL_RCC_SetSPI2I2SClockSource()
1427   MODIFY_REG(RCC->CFGR, RCC_CFGR_SPI3I2SCLKSEL, Source);  in LL_RCC_SetSPI3I2SClockSource()
1440   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SPI2I2SCLKSEL));  in LL_RCC_GetSPI2I2SClockSource()
1455   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SPI3I2SCLKSEL));  in LL_RCC_GetSPI3I2SClockSource()
1513   MODIFY_REG(RCC->CFGR, RCC_CFGR_CLKSYSDIV, Prescaler);  in LL_RCC_SetRC64MPLLPrescaler()
1530   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_CLKSYSDIV));  in LL_RCC_GetRC64MPLLPrescaler()
1554 …return (uint32_t)((READ_BIT(RCC->CFGR, RCC_CFGR_CLKSYSDIV_STATUS) >> RCC_CFGR_CLKSYSDIV_STATUS_Pos…  in LL_RCC_GetCLKSYSPrescalerStatus()
1572   MODIFY_REG(RCC->CFGR, RCC_CFGR_CLKSYSDIV, Prescaler);  in LL_RCC_SetDirectHSEPrescaler()
1588   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_CLKSYSDIV));  in LL_RCC_GetDirectHSEPrescaler()