1170   MODIFY_REG(ADCx->CONF, ADC_CONF_ADC_CONT_1V2, SamplingMode);  in LL_ADC_SetInputSamplingMode()
1183   return (uint32_t)(READ_BIT(ADCx->CONF, ADC_CONF_ADC_CONT_1V2));  in LL_ADC_GetInputSamplingMode()
1195   SET_BIT(ADCx->CONF, ADC_CONF_BIT_INVERT_DIFF);  in LL_ADC_InvertOutputDiffModeEnable()
1207   CLEAR_BIT(ADCx->CONF, ADC_CONF_BIT_INVERT_DIFF);  in LL_ADC_InvertOutputDiffModeDisable()
1219 …return ((READ_BIT(ADCx->CONF, ADC_CONF_BIT_INVERT_DIFF) == (ADC_CONF_BIT_INVERT_DIFF)) ? 1UL : 0UL…  in LL_ADC_IsInvertOutputDiffModeEnabled()
1231   SET_BIT(ADCx->CONF, ADC_CONF_BIT_INVERT_SN);  in LL_ADC_InvertOutputSingleNegModeEnable()
1243   CLEAR_BIT(ADCx->CONF, ADC_CONF_BIT_INVERT_SN);  in LL_ADC_InvertOutputSingleNegModeDisable()
1255   return ((READ_BIT(ADCx->CONF, ADC_CONF_BIT_INVERT_SN) == (ADC_CONF_BIT_INVERT_SN)) ? 1UL : 0UL);  in LL_ADC_IsInvertOutputSingleNegModeEnabled()
1273   MODIFY_REG(ADCx->CONF, ADC_CONF_OVR_DF_CFG, Overrun);  in LL_ADC_SetOverrunDF()
1289   return (uint32_t)(READ_BIT(ADCx->CONF, ADC_CONF_OVR_DF_CFG));  in LL_ADC_GetOverrunDF()
1307   MODIFY_REG(ADCx->CONF, ADC_CONF_OVR_DS_CFG, Overrun);  in LL_ADC_SetOverrunDS()
1323   return (uint32_t)(READ_BIT(ADCx->CONF, ADC_CONF_OVR_DS_CFG));  in LL_ADC_GetOverrunDS()
1335   SET_BIT(ADCx->CONF, ADC_CONF_DMA_DF_ENA);  in LL_ADC_DMAModeDFEnable()
1346   CLEAR_BIT(ADCx->CONF, ADC_CONF_DMA_DF_ENA);  in LL_ADC_DMAModeDFDisable()
1358   return ((READ_BIT(ADCx->CONF, ADC_CONF_DMA_DF_ENA) == (ADC_CONF_DMA_DF_ENA)) ? 1UL : 0UL);  in LL_ADC_IsDMAModeDFEnabled()
1370   SET_BIT(ADCx->CONF, ADC_CONF_DMA_DS_ENA);  in LL_ADC_DMAModeDSEnable()
1382   CLEAR_BIT(ADCx->CONF, ADC_CONF_DMA_DS_ENA);  in LL_ADC_DMAModeDSDisable()
1394   return ((READ_BIT(ADCx->CONF, ADC_CONF_DMA_DS_ENA) == (ADC_CONF_DMA_DS_ENA)) ? 1UL : 0UL);  in LL_ADC_IsDMAModeDSEnabled()
1441   MODIFY_REG(ADCx->CONF, ADC_CONF_SAMPLE_RATE | ADC_CONF_SAMPLE_RATE_MSB, SampleRate);  in LL_ADC_SetSampleRate()
1443   MODIFY_REG(ADCx->CONF, ADC_CONF_SAMPLE_RATE, SampleRate);  in LL_ADC_SetSampleRate()
1491   return (uint32_t)(READ_BIT(ADCx->CONF, ADC_CONF_SAMPLE_RATE | ADC_CONF_SAMPLE_RATE_MSB));  in LL_ADC_GetSampleRate()
1493   return (uint32_t)(READ_BIT(ADCx->CONF, ADC_CONF_SAMPLE_RATE));  in LL_ADC_GetSampleRate()
1510   MODIFY_REG(ADCx->CONF, ADC_CONF_OP_MODE, OperationMode);  in LL_ADC_SetADCMode()
1525   return (uint32_t)(READ_BIT(ADCx->CONF, ADC_CONF_OP_MODE));  in LL_ADC_GetADCMode()
1540   SET_BIT(ADCx->CONF, ADC_CONF_SMPS_SYNCHRO_ENA);  in LL_ADC_SMPSSyncEnable()
1554   CLEAR_BIT(ADCx->CONF, ADC_CONF_SMPS_SYNCHRO_ENA);  in LL_ADC_SMPSSyncDisable()
1569 …return ((READ_BIT(ADCx->CONF, ADC_CONF_SMPS_SYNCHRO_ENA) == (ADC_CONF_SMPS_SYNCHRO_ENA)) ? 1UL : 0…  in LL_ADC_IsSMPSSyncEnabled()
1582   MODIFY_REG(ADCx->CONF, ADC_CONF_SEQ_LEN, (SequenceLength - 1UL) << ADC_CONF_SEQ_LEN_Pos);  in LL_ADC_SetSequenceLength()
1594   return (uint32_t)(READ_BIT(ADCx->CONF, ADC_CONF_SEQ_LEN) >> ADC_CONF_SEQ_LEN_Pos) + 1UL;  in LL_ADC_GetSequenceLength()
1606   SET_BIT(ADCx->CONF, ADC_CONF_SEQUENCE);  in LL_ADC_SequenceModeEnable()
1618   CLEAR_BIT(ADCx->CONF, ADC_CONF_SEQUENCE);  in LL_ADC_SequenceModeDisable()
1630   return ((READ_BIT(ADCx->CONF, ADC_CONF_SEQUENCE) == (ADC_CONF_SEQUENCE)) ? 1UL : 0UL);  in LL_ADC_IsSequenceModeEnabled()
1645   SET_BIT(ADCx->CONF, ADC_CONF_CONT);  in LL_ADC_ContinuousModeEnable()
1658   CLEAR_BIT(ADCx->CONF, ADC_CONF_CONT);  in LL_ADC_ContinuousModeDisable()
1670   return ((READ_BIT(ADCx->CONF, ADC_CONF_CONT) == (ADC_CONF_CONT)) ? 1UL : 0UL);  in LL_ADC_IsContinuousModeEnabled()