Lines Matching refs:hsram
174 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, in HAL_SRAM_Init() argument
178 if (hsram == NULL) in HAL_SRAM_Init()
183 if (hsram->State == HAL_SRAM_STATE_RESET) in HAL_SRAM_Init()
186 hsram->Lock = HAL_UNLOCKED; in HAL_SRAM_Init()
189 if (hsram->MspInitCallback == NULL) in HAL_SRAM_Init()
191 hsram->MspInitCallback = HAL_SRAM_MspInit; in HAL_SRAM_Init()
193 hsram->DmaXferCpltCallback = HAL_SRAM_DMA_XferCpltCallback; in HAL_SRAM_Init()
194 hsram->DmaXferErrorCallback = HAL_SRAM_DMA_XferErrorCallback; in HAL_SRAM_Init()
197 hsram->MspInitCallback(hsram); in HAL_SRAM_Init()
200 HAL_SRAM_MspInit(hsram); in HAL_SRAM_Init()
205 (void)FMC_NORSRAM_Init(hsram->Instance, &(hsram->Init)); in HAL_SRAM_Init()
208 (void)FMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank); in HAL_SRAM_Init()
211 (void)FMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank, in HAL_SRAM_Init()
212 hsram->Init.ExtendedMode); in HAL_SRAM_Init()
215 __FMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank); in HAL_SRAM_Init()
221 hsram->State = HAL_SRAM_STATE_READY; in HAL_SRAM_Init()
232 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram) in HAL_SRAM_DeInit() argument
235 if (hsram->MspDeInitCallback == NULL) in HAL_SRAM_DeInit()
237 hsram->MspDeInitCallback = HAL_SRAM_MspDeInit; in HAL_SRAM_DeInit()
241 hsram->MspDeInitCallback(hsram); in HAL_SRAM_DeInit()
244 HAL_SRAM_MspDeInit(hsram); in HAL_SRAM_DeInit()
248 (void)FMC_NORSRAM_DeInit(hsram->Instance, hsram->Extended, hsram->Init.NSBank); in HAL_SRAM_DeInit()
251 hsram->State = HAL_SRAM_STATE_RESET; in HAL_SRAM_DeInit()
254 __HAL_UNLOCK(hsram); in HAL_SRAM_DeInit()
265 __weak void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram) in HAL_SRAM_MspInit() argument
268 UNUSED(hsram); in HAL_SRAM_MspInit()
281 __weak void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram) in HAL_SRAM_MspDeInit() argument
284 UNUSED(hsram); in HAL_SRAM_MspDeInit()
350 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuff… in HAL_SRAM_Read_8b() argument
356 HAL_SRAM_StateTypeDef state = hsram->State; in HAL_SRAM_Read_8b()
362 __HAL_LOCK(hsram); in HAL_SRAM_Read_8b()
365 hsram->State = HAL_SRAM_STATE_BUSY; in HAL_SRAM_Read_8b()
376 hsram->State = state; in HAL_SRAM_Read_8b()
379 __HAL_UNLOCK(hsram); in HAL_SRAM_Read_8b()
398 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuf… in HAL_SRAM_Write_8b() argument
406 if (hsram->State == HAL_SRAM_STATE_READY) in HAL_SRAM_Write_8b()
409 __HAL_LOCK(hsram); in HAL_SRAM_Write_8b()
412 hsram->State = HAL_SRAM_STATE_BUSY; in HAL_SRAM_Write_8b()
423 hsram->State = HAL_SRAM_STATE_READY; in HAL_SRAM_Write_8b()
426 __HAL_UNLOCK(hsram); in HAL_SRAM_Write_8b()
445 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBu… in HAL_SRAM_Read_16b() argument
452 HAL_SRAM_StateTypeDef state = hsram->State; in HAL_SRAM_Read_16b()
458 __HAL_LOCK(hsram); in HAL_SRAM_Read_16b()
461 hsram->State = HAL_SRAM_STATE_BUSY; in HAL_SRAM_Read_16b()
483 hsram->State = state; in HAL_SRAM_Read_16b()
486 __HAL_UNLOCK(hsram); in HAL_SRAM_Read_16b()
505 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcB… in HAL_SRAM_Write_16b() argument
514 if (hsram->State == HAL_SRAM_STATE_READY) in HAL_SRAM_Write_16b()
517 __HAL_LOCK(hsram); in HAL_SRAM_Write_16b()
520 hsram->State = HAL_SRAM_STATE_BUSY; in HAL_SRAM_Write_16b()
542 hsram->State = HAL_SRAM_STATE_READY; in HAL_SRAM_Write_16b()
545 __HAL_UNLOCK(hsram); in HAL_SRAM_Write_16b()
564 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBu… in HAL_SRAM_Read_32b() argument
570 HAL_SRAM_StateTypeDef state = hsram->State; in HAL_SRAM_Read_32b()
576 __HAL_LOCK(hsram); in HAL_SRAM_Read_32b()
579 hsram->State = HAL_SRAM_STATE_BUSY; in HAL_SRAM_Read_32b()
590 hsram->State = state; in HAL_SRAM_Read_32b()
593 __HAL_UNLOCK(hsram); in HAL_SRAM_Read_32b()
612 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcB… in HAL_SRAM_Write_32b() argument
620 if (hsram->State == HAL_SRAM_STATE_READY) in HAL_SRAM_Write_32b()
623 __HAL_LOCK(hsram); in HAL_SRAM_Write_32b()
626 hsram->State = HAL_SRAM_STATE_BUSY; in HAL_SRAM_Write_32b()
637 hsram->State = HAL_SRAM_STATE_READY; in HAL_SRAM_Write_32b()
640 __HAL_UNLOCK(hsram); in HAL_SRAM_Write_32b()
659 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBu… in HAL_SRAM_Read_DMA() argument
663 HAL_SRAM_StateTypeDef state = hsram->State; in HAL_SRAM_Read_DMA()
671 __HAL_LOCK(hsram); in HAL_SRAM_Read_DMA()
674 hsram->State = HAL_SRAM_STATE_BUSY; in HAL_SRAM_Read_DMA()
679 hsram->hdma->XferCpltCallback = SRAM_DMACplt; in HAL_SRAM_Read_DMA()
683 hsram->hdma->XferCpltCallback = SRAM_DMACpltProt; in HAL_SRAM_Read_DMA()
685 hsram->hdma->XferErrorCallback = SRAM_DMAError; in HAL_SRAM_Read_DMA()
687 if ((hsram->hdma->Mode & DMA_LINKEDLIST) == DMA_LINKEDLIST) in HAL_SRAM_Read_DMA()
689 if ((hsram->hdma->LinkedListQueue != 0U) && (hsram->hdma->LinkedListQueue->Head != 0U)) in HAL_SRAM_Read_DMA()
692 …data_width = hsram->hdma->LinkedListQueue->Head->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR… in HAL_SRAM_Read_DMA()
708 hsram->hdma->LinkedListQueue->Head->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] = size; in HAL_SRAM_Read_DMA()
710 … hsram->hdma->LinkedListQueue->Head->LinkRegisters[NODE_CSAR_DEFAULT_OFFSET] = (uint32_t)pAddress; in HAL_SRAM_Read_DMA()
712 …hsram->hdma->LinkedListQueue->Head->LinkRegisters[NODE_CDAR_DEFAULT_OFFSET] = (uint32_t)pDstBuffer; in HAL_SRAM_Read_DMA()
715 status = HAL_DMAEx_List_Start_IT(hsram->hdma); in HAL_SRAM_Read_DMA()
720 hsram->State = HAL_SRAM_STATE_READY; in HAL_SRAM_Read_DMA()
722 __HAL_UNLOCK(hsram); in HAL_SRAM_Read_DMA()
730 data_width = hsram->hdma->Init.DestDataWidth; in HAL_SRAM_Read_DMA()
746 status = HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, size); in HAL_SRAM_Read_DMA()
750 __HAL_UNLOCK(hsram); in HAL_SRAM_Read_DMA()
769 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcB… in HAL_SRAM_Write_DMA() argument
777 if (hsram->State == HAL_SRAM_STATE_READY) in HAL_SRAM_Write_DMA()
780 __HAL_LOCK(hsram); in HAL_SRAM_Write_DMA()
783 hsram->State = HAL_SRAM_STATE_BUSY; in HAL_SRAM_Write_DMA()
786 hsram->hdma->XferCpltCallback = SRAM_DMACplt; in HAL_SRAM_Write_DMA()
787 hsram->hdma->XferErrorCallback = SRAM_DMAError; in HAL_SRAM_Write_DMA()
789 if ((hsram->hdma->Mode & DMA_LINKEDLIST) == DMA_LINKEDLIST) in HAL_SRAM_Write_DMA()
791 if ((hsram->hdma->LinkedListQueue != 0U) && (hsram->hdma->LinkedListQueue->Head != 0U)) in HAL_SRAM_Write_DMA()
794 …data_width = hsram->hdma->LinkedListQueue->Head->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR… in HAL_SRAM_Write_DMA()
810 hsram->hdma->LinkedListQueue->Head->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] = size; in HAL_SRAM_Write_DMA()
812 …hsram->hdma->LinkedListQueue->Head->LinkRegisters[NODE_CSAR_DEFAULT_OFFSET] = (uint32_t)pSrcBuffer; in HAL_SRAM_Write_DMA()
814 … hsram->hdma->LinkedListQueue->Head->LinkRegisters[NODE_CDAR_DEFAULT_OFFSET] = (uint32_t)pAddress; in HAL_SRAM_Write_DMA()
816 status = HAL_DMAEx_List_Start_IT(hsram->hdma); in HAL_SRAM_Write_DMA()
821 hsram->State = HAL_SRAM_STATE_READY; in HAL_SRAM_Write_DMA()
823 __HAL_UNLOCK(hsram); in HAL_SRAM_Write_DMA()
831 data_width = hsram->hdma->Init.DestDataWidth; in HAL_SRAM_Write_DMA()
847 status = HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, size); in HAL_SRAM_Write_DMA()
851 __HAL_UNLOCK(hsram); in HAL_SRAM_Write_DMA()
873 HAL_StatusTypeDef HAL_SRAM_RegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef C… in HAL_SRAM_RegisterCallback() argument
884 state = hsram->State; in HAL_SRAM_RegisterCallback()
890 hsram->MspInitCallback = pCallback; in HAL_SRAM_RegisterCallback()
893 hsram->MspDeInitCallback = pCallback; in HAL_SRAM_RegisterCallback()
922 HAL_StatusTypeDef HAL_SRAM_UnRegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef… in HAL_SRAM_UnRegisterCallback() argument
927 state = hsram->State; in HAL_SRAM_UnRegisterCallback()
933 hsram->MspInitCallback = HAL_SRAM_MspInit; in HAL_SRAM_UnRegisterCallback()
936 hsram->MspDeInitCallback = HAL_SRAM_MspDeInit; in HAL_SRAM_UnRegisterCallback()
939 hsram->DmaXferCpltCallback = HAL_SRAM_DMA_XferCpltCallback; in HAL_SRAM_UnRegisterCallback()
942 hsram->DmaXferErrorCallback = HAL_SRAM_DMA_XferErrorCallback; in HAL_SRAM_UnRegisterCallback()
955 hsram->MspInitCallback = HAL_SRAM_MspInit; in HAL_SRAM_UnRegisterCallback()
958 hsram->MspDeInitCallback = HAL_SRAM_MspDeInit; in HAL_SRAM_UnRegisterCallback()
986 HAL_StatusTypeDef HAL_SRAM_RegisterDmaCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDe… in HAL_SRAM_RegisterDmaCallback() argument
998 __HAL_LOCK(hsram); in HAL_SRAM_RegisterDmaCallback()
1000 state = hsram->State; in HAL_SRAM_RegisterDmaCallback()
1006 hsram->DmaXferCpltCallback = pCallback; in HAL_SRAM_RegisterDmaCallback()
1009 hsram->DmaXferErrorCallback = pCallback; in HAL_SRAM_RegisterDmaCallback()
1024 __HAL_UNLOCK(hsram); in HAL_SRAM_RegisterDmaCallback()
1054 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram) in HAL_SRAM_WriteOperation_Enable() argument
1057 if (hsram->State == HAL_SRAM_STATE_PROTECTED) in HAL_SRAM_WriteOperation_Enable()
1060 __HAL_LOCK(hsram); in HAL_SRAM_WriteOperation_Enable()
1063 hsram->State = HAL_SRAM_STATE_BUSY; in HAL_SRAM_WriteOperation_Enable()
1066 (void)FMC_NORSRAM_WriteOperation_Enable(hsram->Instance, hsram->Init.NSBank); in HAL_SRAM_WriteOperation_Enable()
1069 hsram->State = HAL_SRAM_STATE_READY; in HAL_SRAM_WriteOperation_Enable()
1072 __HAL_UNLOCK(hsram); in HAL_SRAM_WriteOperation_Enable()
1088 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram) in HAL_SRAM_WriteOperation_Disable() argument
1091 if (hsram->State == HAL_SRAM_STATE_READY) in HAL_SRAM_WriteOperation_Disable()
1094 __HAL_LOCK(hsram); in HAL_SRAM_WriteOperation_Disable()
1097 hsram->State = HAL_SRAM_STATE_BUSY; in HAL_SRAM_WriteOperation_Disable()
1100 (void)FMC_NORSRAM_WriteOperation_Disable(hsram->Instance, hsram->Init.NSBank); in HAL_SRAM_WriteOperation_Disable()
1103 hsram->State = HAL_SRAM_STATE_PROTECTED; in HAL_SRAM_WriteOperation_Disable()
1106 __HAL_UNLOCK(hsram); in HAL_SRAM_WriteOperation_Disable()
1141 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(const SRAM_HandleTypeDef *hsram) in HAL_SRAM_GetState() argument
1143 return hsram->State; in HAL_SRAM_GetState()
1165 SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent); in SRAM_DMACplt() local
1171 hsram->State = HAL_SRAM_STATE_READY; in SRAM_DMACplt()
1174 hsram->DmaXferCpltCallback(hdma); in SRAM_DMACplt()
1187 SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent); in SRAM_DMACpltProt() local
1193 hsram->State = HAL_SRAM_STATE_PROTECTED; in SRAM_DMACpltProt()
1196 hsram->DmaXferCpltCallback(hdma); in SRAM_DMACpltProt()
1209 SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent); in SRAM_DMAError() local
1215 hsram->State = HAL_SRAM_STATE_ERROR; in SRAM_DMAError()
1218 hsram->DmaXferErrorCallback(hdma); in SRAM_DMAError()