Lines Matching full:with
20 * If no LICENSE file comes with this software, it is provided AS-IS.
80 with the right parameter to configure the wake up pin polarity (Low or
199 * The prototype is kept just to maintain compatibility with other
300 (++) PWR_SLEEPENTRY_WFI : Enter SLEEP mode with WFI instruction.
301 (++) PWR_SLEEPENTRY_WFE : Enter SLEEP mode with WFE instruction and
303 (++) PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR: Enter SLEEP mode with WFE instruction and
307 kept as parameter just to maintain compatibility with other families.
317 The Stop 0 mode is based on the Cortex-M33 Deepsleep mode combined with
321 Some peripherals with the LPBAM capability can switch on HSI16 or MSIS or
329 with :
332 (+++) PWR_STOPENTRY_WFI : Enter STOP mode with WFI instruction.
333 (+++) PWR_STOPENTRY_WFE : Enter STOP mode with WFE instruction and
335 (+++) PWR_STOPENTRY_WFE_NO_EVT_CLEAR: Enter STOP mode with WFE instruction and
339 kept as parameter just to maintain compatibility with other families.
344 can be external interrupts or peripherals with wakeup capability.
352 The Standby mode is used to achieve the lowest power consumption with BOR.
357 The RTC can remain active (Standby mode with RTC, Standby mode without
361 I/O with internal pull-up, internal pull-down or floating.
365 Standby mode, supplied by the low-power regulator (Standby with RAM2
466 * wake up source with high polarity detection and the wake
469 * param select the wake up line, the wake up source with
472 * the wake up line, the wake up source with
527 * The parameter is kept just to maintain compatibility with other
529 * @param SleepEntry : Specifies if Sleep mode is entered with WFI or WFE
531 * @arg PWR_SLEEPENTRY_WFI : Enter SLEEP mode with WFI instruction.
532 * @arg PWR_SLEEPENTRY_WFE : Enter SLEEP mode with WFE instruction and
534 * @arg PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR : Enter SLEEP mode with WFE instruction and
571 * allowing a very fast wakeup time but with much higher consumption
587 * The parameter is kept just to maintain compatibility with other
589 * @param StopEntry : Specifies if Stop mode is entered with WFI or WFE
592 * @arg PWR_STOPENTRY_WFI : Enter STOP mode with WFI instruction.
593 * @arg PWR_STOPENTRY_WFE : Enter STOP mode with WFE instruction and
595 * @arg PWR_STOPENTRY_WFE_NO_EVT_CLEAR : Enter STOP mode with WFE instruction and
638 * with BOR. The internal regulator is switched off so that the VCORE
645 * regulator (Standby with RAM2 retention mode) through
648 * software : I/O with internal pull-up through
786 (++) The secured bits are not written (WI) with a non-secure write access.
787 (++) The secured bits are read as 0 (RAZ) with a non-secure read access.
794 By default, after a reset, all PWR registers can be read or written with
796 written with privileged access only. PWR_PRIVCFGR can be read by secure
798 The SPRIV bit in PWR_PRIVCFGR can be written with secure privileged access
802 (++) The PWR secure bits can be written only with privileged access,
804 (++) The PWR secure bits can be read only with privileged access except
810 The NSPRIV bit of PWR_PRIVCFGR can be written with privileged access only,
816 written only with privileged access.
818 only with privileged access except PWR_PRIVCFGR that can be read by
821 and PWR_WUSR, can be read with privileged or unprivileged accesses.