Lines Matching refs:Instance
263 while ((hdsi->Instance->GPSR & DSI_GPSR_CMDFE) == 0U) in DSI_ShortWrite()
274 hdsi->Instance->GHCR = (Mode | (ChannelID << 6U) | (Param1 << 8U) | (Param2 << 16U)); in DSI_ShortWrite()
289 hdsi->Instance->DPCBCR &= ~DSI_DPCBCR; in DSI_ConfigBandControl()
290 hdsi->Instance->DPCBCR |= (hdsi->Init.PHYFrequencyRange << DSI_DPCBCR_Pos); in DSI_ConfigBandControl()
293 hdsi->Instance->DPCSRCR = DSI_DPHY_SLEW_HS_TX_SPEED; in DSI_ConfigBandControl()
296 hdsi->Instance->DPDL0BCR &= ~DSI_DPDL0BCR; in DSI_ConfigBandControl()
297 hdsi->Instance->DPDL0BCR = (hdsi->Init.PHYFrequencyRange << DSI_DPDL0BCR_Pos); in DSI_ConfigBandControl()
300 hdsi->Instance->DPDL0SRCR = DSI_DPHY_SLEW_HS_TX_SPEED; in DSI_ConfigBandControl()
303 hdsi->Instance->DPDL1BCR &= ~DSI_DPDL1BCR; in DSI_ConfigBandControl()
304 hdsi->Instance->DPDL1BCR = (hdsi->Init.PHYFrequencyRange << DSI_DPDL1BCR_Pos); in DSI_ConfigBandControl()
307 hdsi->Instance->DPDL1SRCR = DSI_DPHY_SLEW_HS_TX_SPEED; in DSI_ConfigBandControl()
310 hdsi->Instance->DPDL0HSOCR &= ~DSI_DPDL0HSOCR; in DSI_ConfigBandControl()
311 hdsi->Instance->DPDL1HSOCR &= ~DSI_DPDL1HSOCR; in DSI_ConfigBandControl()
317 hdsi->Instance->DPDL0HSOCR = (DSI_HS_PREPARE_OFFSET0 << DSI_DPDL0HSOCR_Pos); in DSI_ConfigBandControl()
318 hdsi->Instance->DPDL1HSOCR = (DSI_HS_PREPARE_OFFSET0 << DSI_DPDL1HSOCR_Pos); in DSI_ConfigBandControl()
325 hdsi->Instance->DPDL0HSOCR = (DSI_HS_PREPARE_OFFSET1 << DSI_DPDL0HSOCR_Pos); in DSI_ConfigBandControl()
326 hdsi->Instance->DPDL1HSOCR = (DSI_HS_PREPARE_OFFSET1 << DSI_DPDL1HSOCR_Pos); in DSI_ConfigBandControl()
331 hdsi->Instance->DPDL0HSOCR = (DSI_HS_PREPARE_OFFSET2 << DSI_DPDL0HSOCR_Pos); in DSI_ConfigBandControl()
332 hdsi->Instance->DPDL1HSOCR = (DSI_HS_PREPARE_OFFSET2 << DSI_DPDL1HSOCR_Pos); in DSI_ConfigBandControl()
340 hdsi->Instance->DPDL0LPXOCR &= ~DSI_DPDL0LPXOCR; in DSI_ConfigBandControl()
341 hdsi->Instance->DPDL1LPXOCR &= ~DSI_DPDL1LPXOCR; in DSI_ConfigBandControl()
343 hdsi->Instance->DPDL0LPXOCR = hdsi->Init.PHYLowPowerOffset; in DSI_ConfigBandControl()
344 hdsi->Instance->DPDL1LPXOCR = hdsi->Init.PHYLowPowerOffset; in DSI_ConfigBandControl()
359 hdsi->Instance->WRPCR &= ~(DSI_WRPCR_BC); in DSI_SetWrapperPLLTuning()
360 hdsi->Instance->WRPCR |= (PLLInit->PLLVCORange << DSI_WRPCR_BC_Pos); in DSI_SetWrapperPLLTuning()
362 hdsi->Instance->WPTR &= ~(DSI_WPTR_LPF | DSI_WPTR_CP); in DSI_SetWrapperPLLTuning()
365 hdsi->Instance->WPTR |= (PLLInit->PLLTuning << DSI_WPTR_LPF_Pos); in DSI_SetWrapperPLLTuning()
368 hdsi->Instance->WPTR |= (PLLInit->PLLChargePump << DSI_WPTR_CP_Pos); in DSI_SetWrapperPLLTuning()
454 hdsi->Instance->BCFGR |= DSI_BCFGR_PWRUP; in HAL_DSI_Init()
461 hdsi->Instance->WRPCR &= ~(DSI_WRPCR_PLL_NDIV | DSI_WRPCR_PLL_IDF | DSI_WRPCR_PLL_ODF); in HAL_DSI_Init()
462 hdsi->Instance->WRPCR |= (((PLLInit->PLLNDIV) << DSI_WRPCR_PLL_NDIV_Pos) | \ in HAL_DSI_Init()
493 hdsi->Instance->CCR &= ~DSI_CCR_TXECKDIV; in HAL_DSI_Init()
494 hdsi->Instance->CCR |= hdsi->Init.TXEscapeCkdiv; in HAL_DSI_Init()
498 hdsi->Instance->PCTLR |= DSI_PCTLR_DEN; in HAL_DSI_Init()
504 hdsi->Instance->PCTLR |= DSI_PCTLR_CKE; in HAL_DSI_Init()
508 hdsi->Instance->PCONFR &= ~DSI_PCONFR_NL; in HAL_DSI_Init()
509 hdsi->Instance->PCONFR |= hdsi->Init.NumberOfLanes; in HAL_DSI_Init()
513 if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE) in HAL_DSI_Init()
515 while ((hdsi->Instance->PSR & (DSI_PSR_PSS0 | DSI_PSR_PSSC)) != (DSI_PSR_PSS0 | DSI_PSR_PSSC)) in HAL_DSI_Init()
528 while ((hdsi->Instance->PSR & (DSI_PSR_PSS0 | DSI_PSR_PSS1 | DSI_PSR_PSSC)) != (DSI_PSR_PSS0 | \ in HAL_DSI_Init()
545 hdsi->Instance->IER[0U] = 0U; in HAL_DSI_Init()
546 hdsi->Instance->IER[1U] = 0U; in HAL_DSI_Init()
552 hdsi->Instance->CLCR &= ~(DSI_CLCR_DPCC | DSI_CLCR_ACR); in HAL_DSI_Init()
553 hdsi->Instance->CLCR |= (DSI_CLCR_DPCC | hdsi->Init.AutomaticClockLaneControl); in HAL_DSI_Init()
589 hdsi->Instance->PCTLR &= ~(DSI_PCTLR_CKE | DSI_PCTLR_DEN); in HAL_DSI_DeInit()
595 hdsi->Instance->BCFGR &= ~DSI_BCFGR_PWRUP; in HAL_DSI_DeInit()
634 hdsi->Instance->IER[0U] = 0U; in HAL_DSI_ConfigErrorMonitor()
635 hdsi->Instance->IER[1U] = 0U; in HAL_DSI_ConfigErrorMonitor()
643 hdsi->Instance->IER[0U] |= DSI_ERROR_ACK_MASK; in HAL_DSI_ConfigErrorMonitor()
649 hdsi->Instance->IER[0U] |= DSI_ERROR_PHY_MASK; in HAL_DSI_ConfigErrorMonitor()
655 hdsi->Instance->IER[1U] |= DSI_ERROR_TX_MASK; in HAL_DSI_ConfigErrorMonitor()
661 hdsi->Instance->IER[1U] |= DSI_ERROR_RX_MASK; in HAL_DSI_ConfigErrorMonitor()
667 hdsi->Instance->IER[1U] |= DSI_ERROR_ECC_MASK; in HAL_DSI_ConfigErrorMonitor()
673 hdsi->Instance->IER[1U] |= DSI_ERROR_CRC_MASK; in HAL_DSI_ConfigErrorMonitor()
679 hdsi->Instance->IER[1U] |= DSI_ERROR_PSE_MASK; in HAL_DSI_ConfigErrorMonitor()
685 hdsi->Instance->IER[1U] |= DSI_ERROR_EOT_MASK; in HAL_DSI_ConfigErrorMonitor()
691 hdsi->Instance->IER[1U] |= DSI_ERROR_OVF_MASK; in HAL_DSI_ConfigErrorMonitor()
697 hdsi->Instance->IER[1U] |= DSI_ERROR_GEN_MASK; in HAL_DSI_ConfigErrorMonitor()
703 hdsi->Instance->IER[1U] |= DSI_ERROR_PBU_MASK; in HAL_DSI_ConfigErrorMonitor()
993 ErrorStatus0 = hdsi->Instance->ISR[0U]; in HAL_DSI_IRQHandler()
994 ErrorStatus0 &= hdsi->Instance->IER[0U]; in HAL_DSI_IRQHandler()
995 ErrorStatus1 = hdsi->Instance->ISR[1U]; in HAL_DSI_IRQHandler()
996 ErrorStatus1 &= hdsi->Instance->IER[1U]; in HAL_DSI_IRQHandler()
1169 hdsi->Instance->GVCIDR &= ~DSI_GVCIDR_VCIDRX; in HAL_DSI_SetGenericVCIDRX()
1170 hdsi->Instance->GVCIDR |= VirtualChannelIdRx << DSI_GVCIDR_VCIDRX_Pos; in HAL_DSI_SetGenericVCIDRX()
1191 hdsi->Instance->GVCIDR &= ~DSI_GVCIDR_VCIDTX; in HAL_DSI_SetGenericVCIDTX()
1192 hdsi->Instance->GVCIDR |= VirtualChannelIdTx << DSI_GVCIDR_VCIDTX_Pos; in HAL_DSI_SetGenericVCIDTX()
1212 hdsi->Instance->GVCIDR &= ~(DSI_GVCIDR_VCIDRX | DSI_GVCIDR_VCIDTX); in HAL_DSI_SetGenericVCID()
1213 hdsi->Instance->GVCIDR |= ((VirtualChannelID << DSI_GVCIDR_VCIDRX_Pos) | \ in HAL_DSI_SetGenericVCID()
1256 hdsi->Instance->MCR &= ~DSI_MCR_CMDM; in HAL_DSI_ConfigVideoMode()
1257 hdsi->Instance->WCFGR &= ~DSI_WCFGR_DSIM; in HAL_DSI_ConfigVideoMode()
1260 hdsi->Instance->VMCR &= ~DSI_VMCR_VMT; in HAL_DSI_ConfigVideoMode()
1261 hdsi->Instance->VMCR |= VidCfg->Mode; in HAL_DSI_ConfigVideoMode()
1264 hdsi->Instance->VPCR &= ~DSI_VPCR_VPSIZE; in HAL_DSI_ConfigVideoMode()
1265 hdsi->Instance->VPCR |= VidCfg->PacketSize; in HAL_DSI_ConfigVideoMode()
1268 hdsi->Instance->VCCR &= ~DSI_VCCR_NUMC; in HAL_DSI_ConfigVideoMode()
1269 hdsi->Instance->VCCR |= VidCfg->NumberOfChunks; in HAL_DSI_ConfigVideoMode()
1272 hdsi->Instance->VNPCR &= ~DSI_VNPCR_NPSIZE; in HAL_DSI_ConfigVideoMode()
1273 hdsi->Instance->VNPCR |= VidCfg->NullPacketSize; in HAL_DSI_ConfigVideoMode()
1276 hdsi->Instance->LVCIDR &= ~DSI_LVCIDR_VCID; in HAL_DSI_ConfigVideoMode()
1277 hdsi->Instance->LVCIDR |= VidCfg->VirtualChannelID; in HAL_DSI_ConfigVideoMode()
1280 hdsi->Instance->LPCR &= ~(DSI_LPCR_DEP | DSI_LPCR_VSP | DSI_LPCR_HSP); in HAL_DSI_ConfigVideoMode()
1281 hdsi->Instance->LPCR |= (VidCfg->DEPolarity | VidCfg->VSPolarity | VidCfg->HSPolarity); in HAL_DSI_ConfigVideoMode()
1284 hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_COLC; in HAL_DSI_ConfigVideoMode()
1285 hdsi->Instance->LCOLCR |= VidCfg->ColorCoding; in HAL_DSI_ConfigVideoMode()
1288 hdsi->Instance->WCFGR &= ~DSI_WCFGR_COLMUX; in HAL_DSI_ConfigVideoMode()
1289 hdsi->Instance->WCFGR |= ((VidCfg->ColorCoding) << 1U); in HAL_DSI_ConfigVideoMode()
1294 hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_LPE; in HAL_DSI_ConfigVideoMode()
1295 hdsi->Instance->LCOLCR |= VidCfg->LooselyPacked; in HAL_DSI_ConfigVideoMode()
1299 hdsi->Instance->VHSACR &= ~DSI_VHSACR_HSA; in HAL_DSI_ConfigVideoMode()
1300 hdsi->Instance->VHSACR |= VidCfg->HorizontalSyncActive; in HAL_DSI_ConfigVideoMode()
1303 hdsi->Instance->VHBPCR &= ~DSI_VHBPCR_HBP; in HAL_DSI_ConfigVideoMode()
1304 hdsi->Instance->VHBPCR |= VidCfg->HorizontalBackPorch; in HAL_DSI_ConfigVideoMode()
1307 hdsi->Instance->VLCR &= ~DSI_VLCR_HLINE; in HAL_DSI_ConfigVideoMode()
1308 hdsi->Instance->VLCR |= VidCfg->HorizontalLine; in HAL_DSI_ConfigVideoMode()
1311 hdsi->Instance->VVSACR &= ~DSI_VVSACR_VSA; in HAL_DSI_ConfigVideoMode()
1312 hdsi->Instance->VVSACR |= VidCfg->VerticalSyncActive; in HAL_DSI_ConfigVideoMode()
1315 hdsi->Instance->VVBPCR &= ~DSI_VVBPCR_VBP; in HAL_DSI_ConfigVideoMode()
1316 hdsi->Instance->VVBPCR |= VidCfg->VerticalBackPorch; in HAL_DSI_ConfigVideoMode()
1319 hdsi->Instance->VVFPCR &= ~DSI_VVFPCR_VFP; in HAL_DSI_ConfigVideoMode()
1320 hdsi->Instance->VVFPCR |= VidCfg->VerticalFrontPorch; in HAL_DSI_ConfigVideoMode()
1323 hdsi->Instance->VVACR &= ~DSI_VVACR_VA; in HAL_DSI_ConfigVideoMode()
1324 hdsi->Instance->VVACR |= VidCfg->VerticalActive; in HAL_DSI_ConfigVideoMode()
1327 hdsi->Instance->VMCR &= ~DSI_VMCR_LPCE; in HAL_DSI_ConfigVideoMode()
1328 hdsi->Instance->VMCR |= VidCfg->LPCommandEnable; in HAL_DSI_ConfigVideoMode()
1331 hdsi->Instance->LPMCR &= ~DSI_LPMCR_LPSIZE; in HAL_DSI_ConfigVideoMode()
1332 hdsi->Instance->LPMCR |= ((VidCfg->LPLargestPacketSize) << 16U); in HAL_DSI_ConfigVideoMode()
1335 hdsi->Instance->LPMCR &= ~DSI_LPMCR_VLPSIZE; in HAL_DSI_ConfigVideoMode()
1336 hdsi->Instance->LPMCR |= VidCfg->LPVACTLargestPacketSize; in HAL_DSI_ConfigVideoMode()
1339 hdsi->Instance->VMCR &= ~DSI_VMCR_LPHFPE; in HAL_DSI_ConfigVideoMode()
1340 hdsi->Instance->VMCR |= VidCfg->LPHorizontalFrontPorchEnable; in HAL_DSI_ConfigVideoMode()
1343 hdsi->Instance->VMCR &= ~DSI_VMCR_LPHBPE; in HAL_DSI_ConfigVideoMode()
1344 hdsi->Instance->VMCR |= VidCfg->LPHorizontalBackPorchEnable; in HAL_DSI_ConfigVideoMode()
1347 hdsi->Instance->VMCR &= ~DSI_VMCR_LPVAE; in HAL_DSI_ConfigVideoMode()
1348 hdsi->Instance->VMCR |= VidCfg->LPVerticalActiveEnable; in HAL_DSI_ConfigVideoMode()
1351 hdsi->Instance->VMCR &= ~DSI_VMCR_LPVFPE; in HAL_DSI_ConfigVideoMode()
1352 hdsi->Instance->VMCR |= VidCfg->LPVerticalFrontPorchEnable; in HAL_DSI_ConfigVideoMode()
1355 hdsi->Instance->VMCR &= ~DSI_VMCR_LPVBPE; in HAL_DSI_ConfigVideoMode()
1356 hdsi->Instance->VMCR |= VidCfg->LPVerticalBackPorchEnable; in HAL_DSI_ConfigVideoMode()
1359 hdsi->Instance->VMCR &= ~DSI_VMCR_LPVSAE; in HAL_DSI_ConfigVideoMode()
1360 hdsi->Instance->VMCR |= VidCfg->LPVerticalSyncActiveEnable; in HAL_DSI_ConfigVideoMode()
1363 hdsi->Instance->VMCR &= ~DSI_VMCR_FBTAAE; in HAL_DSI_ConfigVideoMode()
1364 hdsi->Instance->VMCR |= VidCfg->FrameBTAAcknowledgeEnable; in HAL_DSI_ConfigVideoMode()
1397 hdsi->Instance->MCR |= DSI_MCR_CMDM; in HAL_DSI_ConfigAdaptedCommandMode()
1398 hdsi->Instance->WCFGR &= ~DSI_WCFGR_DSIM; in HAL_DSI_ConfigAdaptedCommandMode()
1399 hdsi->Instance->WCFGR |= DSI_WCFGR_DSIM; in HAL_DSI_ConfigAdaptedCommandMode()
1402 hdsi->Instance->LVCIDR &= ~DSI_LVCIDR_VCID; in HAL_DSI_ConfigAdaptedCommandMode()
1403 hdsi->Instance->LVCIDR |= CmdCfg->VirtualChannelID; in HAL_DSI_ConfigAdaptedCommandMode()
1406 hdsi->Instance->LPCR &= ~(DSI_LPCR_DEP | DSI_LPCR_VSP | DSI_LPCR_HSP); in HAL_DSI_ConfigAdaptedCommandMode()
1407 hdsi->Instance->LPCR |= (CmdCfg->DEPolarity | CmdCfg->VSPolarity | CmdCfg->HSPolarity); in HAL_DSI_ConfigAdaptedCommandMode()
1410 hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_COLC; in HAL_DSI_ConfigAdaptedCommandMode()
1411 hdsi->Instance->LCOLCR |= CmdCfg->ColorCoding; in HAL_DSI_ConfigAdaptedCommandMode()
1414 hdsi->Instance->WCFGR &= ~DSI_WCFGR_COLMUX; in HAL_DSI_ConfigAdaptedCommandMode()
1415 hdsi->Instance->WCFGR |= ((CmdCfg->ColorCoding) << 1U); in HAL_DSI_ConfigAdaptedCommandMode()
1418 hdsi->Instance->LCCR &= ~DSI_LCCR_CMDSIZE; in HAL_DSI_ConfigAdaptedCommandMode()
1419 hdsi->Instance->LCCR |= CmdCfg->CommandSize; in HAL_DSI_ConfigAdaptedCommandMode()
1422 hdsi->Instance->WCFGR &= ~(DSI_WCFGR_TESRC | DSI_WCFGR_TEPOL | DSI_WCFGR_AR | DSI_WCFGR_VSPOL); in HAL_DSI_ConfigAdaptedCommandMode()
1423 …hdsi->Instance->WCFGR |= (CmdCfg->TearingEffectSource | CmdCfg->TearingEffectPolarity | CmdCfg->Au… in HAL_DSI_ConfigAdaptedCommandMode()
1427 hdsi->Instance->CMCR &= ~DSI_CMCR_TEARE; in HAL_DSI_ConfigAdaptedCommandMode()
1428 hdsi->Instance->CMCR |= CmdCfg->TEAcknowledgeRequest; in HAL_DSI_ConfigAdaptedCommandMode()
1471 hdsi->Instance->CMCR &= ~(DSI_CMCR_GSW0TX | \ in HAL_DSI_ConfigCommand()
1483 hdsi->Instance->CMCR |= (LPCmd->LPGenShortWriteNoP | \ in HAL_DSI_ConfigCommand()
1497 hdsi->Instance->CMCR &= ~DSI_CMCR_ARE; in HAL_DSI_ConfigCommand()
1498 hdsi->Instance->CMCR |= LPCmd->AcknowledgeRequest; in HAL_DSI_ConfigCommand()
1523 hdsi->Instance->PCR &= ~DSI_FLOW_CONTROL_ALL; in HAL_DSI_ConfigFlowControl()
1524 hdsi->Instance->PCR |= FlowControl; in HAL_DSI_ConfigFlowControl()
1566 hdsi->Instance->CLTCR &= ~(DSI_CLTCR_LP2HS_TIME | DSI_CLTCR_HS2LP_TIME); in HAL_DSI_ConfigPhyTimer()
1567 hdsi->Instance->CLTCR |= (maxTime | ((maxTime) << 16U)); in HAL_DSI_ConfigPhyTimer()
1570 hdsi->Instance->DLTCR &= ~(DSI_DLTCR_LP2HS_TIME | DSI_DLTCR_HS2LP_TIME); in HAL_DSI_ConfigPhyTimer()
1571 hdsi->Instance->DLTCR |= (PhyTimers->DataLaneLP2HSTime | ((PhyTimers->DataLaneHS2LPTime) << 16U)); in HAL_DSI_ConfigPhyTimer()
1572 hdsi->Instance->DLTRCR &= ~DSI_DLTRCR_MRD_TIME; in HAL_DSI_ConfigPhyTimer()
1573 hdsi->Instance->DLTRCR |= PhyTimers->DataLaneMaxReadTime; in HAL_DSI_ConfigPhyTimer()
1576 hdsi->Instance->PCONFR &= ~DSI_PCONFR_SW_TIME; in HAL_DSI_ConfigPhyTimer()
1577 hdsi->Instance->PCONFR |= ((PhyTimers->StopWaitTime) << 8U); in HAL_DSI_ConfigPhyTimer()
1599 hdsi->Instance->CCR &= ~DSI_CCR_TOCKDIV; in HAL_DSI_ConfigHostTimeouts()
1600 hdsi->Instance->CCR |= ((HostTimeouts->TimeoutCkdiv) << 8U); in HAL_DSI_ConfigHostTimeouts()
1603 hdsi->Instance->TCCR[0U] &= ~DSI_TCCR0_HSTX_TOCNT; in HAL_DSI_ConfigHostTimeouts()
1604 hdsi->Instance->TCCR[0U] |= ((HostTimeouts->HighSpeedTransmissionTimeout) << 16U); in HAL_DSI_ConfigHostTimeouts()
1607 hdsi->Instance->TCCR[0U] &= ~DSI_TCCR0_LPRX_TOCNT; in HAL_DSI_ConfigHostTimeouts()
1608 hdsi->Instance->TCCR[0U] |= HostTimeouts->LowPowerReceptionTimeout; in HAL_DSI_ConfigHostTimeouts()
1611 hdsi->Instance->TCCR[1U] &= ~DSI_TCCR1_HSRD_TOCNT; in HAL_DSI_ConfigHostTimeouts()
1612 hdsi->Instance->TCCR[1U] |= HostTimeouts->HighSpeedReadTimeout; in HAL_DSI_ConfigHostTimeouts()
1615 hdsi->Instance->TCCR[2U] &= ~DSI_TCCR2_LPRD_TOCNT; in HAL_DSI_ConfigHostTimeouts()
1616 hdsi->Instance->TCCR[2U] |= HostTimeouts->LowPowerReadTimeout; in HAL_DSI_ConfigHostTimeouts()
1619 hdsi->Instance->TCCR[3U] &= ~DSI_TCCR3_HSWR_TOCNT; in HAL_DSI_ConfigHostTimeouts()
1620 hdsi->Instance->TCCR[3U] |= HostTimeouts->HighSpeedWriteTimeout; in HAL_DSI_ConfigHostTimeouts()
1623 hdsi->Instance->TCCR[3U] &= ~DSI_TCCR3_PM; in HAL_DSI_ConfigHostTimeouts()
1624 hdsi->Instance->TCCR[3U] |= HostTimeouts->HighSpeedWritePrespMode; in HAL_DSI_ConfigHostTimeouts()
1627 hdsi->Instance->TCCR[4U] &= ~DSI_TCCR4_LPWR_TOCNT; in HAL_DSI_ConfigHostTimeouts()
1628 hdsi->Instance->TCCR[4U] |= HostTimeouts->LowPowerWriteTimeout; in HAL_DSI_ConfigHostTimeouts()
1631 hdsi->Instance->TCCR[5U] &= ~DSI_TCCR5_BTA_TOCNT; in HAL_DSI_ConfigHostTimeouts()
1632 hdsi->Instance->TCCR[5U] |= HostTimeouts->BTATimeout; in HAL_DSI_ConfigHostTimeouts()
1698 hdsi->Instance->WCR |= DSI_WCR_LTDCEN; in HAL_DSI_Refresh()
1723 hdsi->Instance->WCR &= ~DSI_WCR_COLM; in HAL_DSI_ColorMode()
1724 hdsi->Instance->WCR |= ColorMode; in HAL_DSI_ColorMode()
1749 hdsi->Instance->WCR &= ~DSI_WCR_SHTDN; in HAL_DSI_Shutdown()
1750 hdsi->Instance->WCR |= Shutdown; in HAL_DSI_Shutdown()
1830 while ((hdsi->Instance->GPSR & DSI_GPSR_CMDFE) == 0U) in HAL_DSI_LongWrite()
1850 hdsi->Instance->GPDR = fifoword; in HAL_DSI_LongWrite()
1863 hdsi->Instance->GPDR = fifoword; in HAL_DSI_LongWrite()
1870 DSI_ConfigPacketHeader(hdsi->Instance, in HAL_DSI_LongWrite()
1932 DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, DCSCmd, 0U); in HAL_DSI_Read()
1936 DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, 0U, 0U); in HAL_DSI_Read()
1940 DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, ParametersTable[0U], 0U); in HAL_DSI_Read()
1944 …DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, ParametersTable[0U], ParametersTable[1U]); in HAL_DSI_Read()
1960 if ((hdsi->Instance->GPSR & DSI_GPSR_PRDFE) == 0U) in HAL_DSI_Read()
1962 fifoword = hdsi->Instance->GPDR; in HAL_DSI_Read()
1986 if ((hdsi->Instance->GPSR & DSI_GPSR_RCB) == 0U) in HAL_DSI_Read()
1988 if ((hdsi->Instance->ISR[1U] & DSI_ISR1_PSE) == DSI_ISR1_PSE) in HAL_DSI_Read()
2021 if ((hdsi->Instance->PCTLR & (DSI_PCTLR_CKE | DSI_PCTLR_DEN)) != (DSI_PCTLR_CKE | DSI_PCTLR_DEN)) in HAL_DSI_EnterULPMData()
2029 if ((hdsi->Instance->WRPCR & DSI_WRPCR_PLLEN) != DSI_WRPCR_PLLEN) in HAL_DSI_EnterULPMData()
2035 else if ((hdsi->Instance->BCFGR & DSI_BCFGR_PWRUP) != DSI_BCFGR_PWRUP) in HAL_DSI_EnterULPMData()
2047 if ((hdsi->Instance->PUCR & (DSI_PUCR_UEDL | DSI_PUCR_URDL)) != 0U) in HAL_DSI_EnterULPMData()
2055 if ((hdsi->Instance->PTTCR & DSI_PTTCR_TX_TRIG) != 0U) in HAL_DSI_EnterULPMData()
2082 if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE) in HAL_DSI_EnterULPMData()
2084 if ((hdsi->Instance->PSR & DSI_PSR_UAN0) != DSI_PSR_UAN0) in HAL_DSI_EnterULPMData()
2091 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES) in HAL_DSI_EnterULPMData()
2093 if ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1)) != (DSI_PSR_UAN0 | DSI_PSR_UAN1)) in HAL_DSI_EnterULPMData()
2108 hdsi->Instance->PUCR |= DSI_PUCR_URDL; in HAL_DSI_EnterULPMData()
2114 if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE) in HAL_DSI_EnterULPMData()
2116 while ((hdsi->Instance->PSR & DSI_PSR_UAN0) != 0U) in HAL_DSI_EnterULPMData()
2128 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES) in HAL_DSI_EnterULPMData()
2130 while ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1)) != 0U) in HAL_DSI_EnterULPMData()
2171 if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE) in HAL_DSI_ExitULPMData()
2173 if ((hdsi->Instance->PSR & DSI_PSR_UAN0) != 0U) in HAL_DSI_ExitULPMData()
2181 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES) in HAL_DSI_ExitULPMData()
2183 if ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1)) != 0U) in HAL_DSI_ExitULPMData()
2223 hdsi->Instance->PUCR |= DSI_PUCR_UEDL; in HAL_DSI_ExitULPMData()
2229 if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE) in HAL_DSI_ExitULPMData()
2231 while ((hdsi->Instance->PSR & DSI_PSR_UAN0) != DSI_PSR_UAN0) in HAL_DSI_ExitULPMData()
2243 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES) in HAL_DSI_ExitULPMData()
2245 while ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1)) != (DSI_PSR_UAN0 | DSI_PSR_UAN1)) in HAL_DSI_ExitULPMData()
2269 hdsi->Instance->PUCR = 0U; in HAL_DSI_ExitULPMData()
2272 if ((hdsi->Instance->WRPCR & DSI_WRPCR_PLLEN) != DSI_WRPCR_PLLEN) in HAL_DSI_ExitULPMData()
2280 if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE) in HAL_DSI_ExitULPMData()
2282 if ((hdsi->Instance->PSR & DSI_PSR_UAN0) != DSI_PSR_UAN0) in HAL_DSI_ExitULPMData()
2289 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES) in HAL_DSI_ExitULPMData()
2291 if ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1)) != (DSI_PSR_UAN0 | DSI_PSR_UAN1)) in HAL_DSI_ExitULPMData()
2349 if ((hdsi->Instance->PCTLR & (DSI_PCTLR_CKE | DSI_PCTLR_DEN)) != (DSI_PCTLR_CKE | DSI_PCTLR_DEN)) in HAL_DSI_EnterULPM()
2357 if ((hdsi->Instance->WRPCR & DSI_WRPCR_PLLEN) != DSI_WRPCR_PLLEN) in HAL_DSI_EnterULPM()
2363 else if ((hdsi->Instance->BCFGR & DSI_BCFGR_PWRUP) != DSI_BCFGR_PWRUP) in HAL_DSI_EnterULPM()
2375 …if ((hdsi->Instance->PUCR & (DSI_PUCR_UEDL | DSI_PUCR_URDL | DSI_PUCR_UECL | DSI_PUCR_URCL)) != 0U) in HAL_DSI_EnterULPM()
2383 if ((hdsi->Instance->PTTCR & DSI_PTTCR_TX_TRIG) != 0U) in HAL_DSI_EnterULPM()
2410 if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE) in HAL_DSI_EnterULPM()
2412 if ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_PSS0)) != (DSI_PSR_UAN0 | DSI_PSR_PSS0)) in HAL_DSI_EnterULPM()
2419 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES) in HAL_DSI_EnterULPM()
2421 if ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_PSS0 | DSI_PSR_PSS1 | \ in HAL_DSI_EnterULPM()
2437 hdsi->Instance->CLCR &= ~DSI_CLCR_DPCC; in HAL_DSI_EnterULPM()
2443 hdsi->Instance->PUCR |= (DSI_PUCR_URCL | DSI_PUCR_URDL); in HAL_DSI_EnterULPM()
2449 if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE) in HAL_DSI_EnterULPM()
2451 while ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UANC)) != 0U) in HAL_DSI_EnterULPM()
2463 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES) in HAL_DSI_EnterULPM()
2465 while ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1 | DSI_PSR_UANC)) != 0U) in HAL_DSI_EnterULPM()
2509 if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE) in HAL_DSI_ExitULPM()
2511 if ((hdsi->Instance->PSR & (DSI_PSR_RUE0 | DSI_PSR_UAN0 | DSI_PSR_PSS0 | \ in HAL_DSI_ExitULPM()
2520 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES) in HAL_DSI_ExitULPM()
2522 if ((hdsi->Instance->PSR & (DSI_PSR_RUE0 | DSI_PSR_UAN0 | DSI_PSR_PSS0 | DSI_PSR_UAN1 | \ in HAL_DSI_ExitULPM()
2563 hdsi->Instance->PUCR |= (DSI_PUCR_UECL | DSI_PUCR_UEDL); in HAL_DSI_ExitULPM()
2569 if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE) in HAL_DSI_ExitULPM()
2571 while ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UANC)) != (DSI_PSR_UAN0 | DSI_PSR_UANC)) in HAL_DSI_ExitULPM()
2583 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES) in HAL_DSI_ExitULPM()
2585 …while ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1 | DSI_PSR_UANC)) != (DSI_PSR_UAN0 | DSI… in HAL_DSI_ExitULPM()
2610 hdsi->Instance->PUCR = 0U; in HAL_DSI_ExitULPM()
2616 hdsi->Instance->CLCR |= DSI_CLCR_DPCC; in HAL_DSI_ExitULPM()
2619 if ((hdsi->Instance->WRPCR & DSI_WRPCR_PLLEN) != DSI_WRPCR_PLLEN) in HAL_DSI_ExitULPM()
2627 if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE) in HAL_DSI_ExitULPM()
2629 if ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_PSS0)) != (DSI_PSR_UAN0 | DSI_PSR_PSS0)) in HAL_DSI_ExitULPM()
2636 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES) in HAL_DSI_ExitULPM()
2638 if ((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_PSS0 | DSI_PSR_PSS1 | \ in HAL_DSI_ExitULPM()
2700 hdsi->Instance->VMCR &= ~(DSI_VMCR_PGM | DSI_VMCR_PGO); in HAL_DSI_PatternGeneratorStart()
2701 hdsi->Instance->VMCR |= ((Mode << 20U) | (Orientation << 24U)); in HAL_DSI_PatternGeneratorStart()
2704 hdsi->Instance->VMCR |= DSI_VMCR_PGE; in HAL_DSI_PatternGeneratorStart()
2724 hdsi->Instance->VMCR &= ~DSI_VMCR_PGE; in HAL_DSI_PatternGeneratorStop()
2760 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWCL; in HAL_DSI_SetLanePinsConfiguration()
2761 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 6U); in HAL_DSI_SetLanePinsConfiguration()
2766 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWDL0; in HAL_DSI_SetLanePinsConfiguration()
2767 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 7U); in HAL_DSI_SetLanePinsConfiguration()
2772 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWDL1; in HAL_DSI_SetLanePinsConfiguration()
2773 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 8U); in HAL_DSI_SetLanePinsConfiguration()
2814 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_FTXSMCL; in HAL_DSI_ForceTXStopMode()
2815 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 12U); in HAL_DSI_ForceTXStopMode()
2820 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_FTXSMDL; in HAL_DSI_ForceTXStopMode()
2821 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 13U); in HAL_DSI_ForceTXStopMode()