348   SET_BIT(UCPDx->CFG1, UCPD_CFG1_UCPDEN);  in LL_UCPD_Enable()
360   CLEAR_BIT(UCPDx->CFG1, UCPD_CFG1_UCPDEN);  in LL_UCPD_Disable()
371   return ((READ_BIT(UCPDx->CFG1, UCPD_CFG1_UCPDEN) == (UCPD_CFG1_UCPDEN)) ? 1UL : 0UL);  in LL_UCPD_IsEnabled()
392   MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_RXORDSETEN, OrderSet);  in LL_UCPD_SetRxOrderSet()
409   MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_PSC_UCPDCLK, Psc);  in LL_UCPD_SetPSCClk()
421   MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_TRANSWIN, TransWin << UCPD_CFG1_TRANSWIN_Pos);  in LL_UCPD_SetTransWin()
433   MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_IFRGAP, IfrGap << UCPD_CFG1_IFRGAP_Pos);  in LL_UCPD_SetIfrGap()
445   MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_HBITCLKDIV, HbitClock << UCPD_CFG1_HBITCLKDIV_Pos);  in LL_UCPD_SetHbitClockDiv()
1685   SET_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN);  in LL_UCPD_RxDMAEnable()
1696   CLEAR_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN);  in LL_UCPD_RxDMADisable()
1707   SET_BIT(UCPDx->CFG1, UCPD_CFG1_TXDMAEN);  in LL_UCPD_TxDMAEnable()
1718   CLEAR_BIT(UCPDx->CFG1, UCPD_CFG1_TXDMAEN);  in LL_UCPD_TxDMADisable()
1729   return ((READ_BIT(UCPDx->CFG1, UCPD_CFG1_TXDMAEN) == (UCPD_CFG1_TXDMAEN)) ? 1UL : 0UL);  in LL_UCPD_IsEnabledTxDMA()
1740   return ((READ_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN) == (UCPD_CFG1_RXDMAEN)) ? 1UL : 0UL);  in LL_UCPD_IsEnabledRxDMA()