Lines Matching refs:AHB3SMENR

3489 #define __HAL_RCC_LPGPIO1_CLK_SLEEP_ENABLE()          SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_LPGPIO1…
3491 #define __HAL_RCC_PWR_CLK_SLEEP_ENABLE()              SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_PWRSMEN)
3493 #define __HAL_RCC_ADC4_CLK_SLEEP_ENABLE()             SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_ADC4SME…
3495 #define __HAL_RCC_DAC1_CLK_SLEEP_ENABLE()             SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_DAC1SME…
3497 #define __HAL_RCC_LPDMA1_CLK_SLEEP_ENABLE()           SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_LPDMA1S…
3499 #define __HAL_RCC_ADF1_CLK_SLEEP_ENABLE()             SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_ADF1SME…
3501 #define __HAL_RCC_GTZC2_CLK_SLEEP_ENABLE()            SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_GTZC2SM…
3503 #define __HAL_RCC_SRAM4_CLK_SLEEP_ENABLE()            SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_SRAM4SM…
3505 #define __HAL_RCC_LPGPIO1_CLK_SLEEP_DISABLE()         CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_LPGPI…
3507 #define __HAL_RCC_PWR_CLK_SLEEP_DISABLE()             CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_PWRSM…
3509 #define __HAL_RCC_ADC4_CLK_SLEEP_DISABLE()            CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_ADC4S…
3511 #define __HAL_RCC_DAC1_CLK_SLEEP_DISABLE()            CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_DAC1S…
3513 #define __HAL_RCC_LPDMA1_CLK_SLEEP_DISABLE()          CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_LPDMA…
3515 #define __HAL_RCC_ADF1_CLK_SLEEP_DISABLE()            CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_ADF1S…
3517 #define __HAL_RCC_GTZC2_CLK_SLEEP_DISABLE()           CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_GTZC2…
3519 #define __HAL_RCC_SRAM4_CLK_SLEEP_DISABLE()           CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_SRAM4…