Lines Matching refs:AHB2ENR2

1120                                                     SET_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_FSMCEN); \
1122 …                                           tmpreg = READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_FSMCEN); \
1129 …                                                 SET_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_OCTOSPI1EN); \
1131 …                                       tmpreg = READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_OCTOSPI1EN); \
1138 …                                                 SET_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_OCTOSPI2EN); \
1140 …                                       tmpreg = READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_OCTOSPI2EN); \
1233                                                     SET_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_HSPI1EN); \
1235 …                                          tmpreg = READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_HSPI1EN); \
1243                                                     SET_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_SRAM6EN); \
1245 …                                          tmpreg = READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_SRAM6EN); \
1253                                                     SET_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_SRAM5EN); \
1255 …                                          tmpreg = READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_SRAM5EN); \
1261 #define __HAL_RCC_FMC_CLK_DISABLE()            CLEAR_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_FSMCEN)
1264 #define __HAL_RCC_OSPI1_CLK_DISABLE()          CLEAR_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_OCTOSPI1EN)
1267 #define __HAL_RCC_OSPI2_CLK_DISABLE()          CLEAR_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_OCTOSPI2EN)
1271 #define __HAL_RCC_HSPI1_CLK_DISABLE()          CLEAR_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_HSPI1EN)
1275 #define __HAL_RCC_SRAM6_CLK_DISABLE()          CLEAR_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_SRAM6EN)
1279 #define __HAL_RCC_SRAM5_CLK_DISABLE()          CLEAR_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_SRAM5EN)
2168 #define __HAL_RCC_FMC_IS_CLK_ENABLED()          (READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_FSMCEN) != 0U)
2171 #define __HAL_RCC_OSPI1_IS_CLK_ENABLED()        (READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_OCTOSPI1EN) !…
2174 #define __HAL_RCC_OSPI2_IS_CLK_ENABLED()        (READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_OCTOSPI2EN) !…
2178 #define __HAL_RCC_HSPI1_IS_CLK_ENABLED()        (READ_BIT(RCC->AHB2ENR2,RCC_AHB2ENR2_HSPI1EN) != 0U)
2182 #define __HAL_RCC_SRAM6_IS_CLK_ENABLED()        (READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_SRAM6EN) != 0…
2186 #define __HAL_RCC_SRAM5_IS_CLK_ENABLED()        (READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_SRAM5EN) != 0…
2271 #define __HAL_RCC_FMC_IS_CLK_DISABLED()         (READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_FSMCEN) == 0U)
2274 #define __HAL_RCC_OSPI1_IS_CLK_DISABLED()       (READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_OCTOSPI1EN) =…
2277 #define __HAL_RCC_OSPI2_IS_CLK_DISABLED()       (READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_OCTOSPI2EN) =…
2281 #define __HAL_RCC_HSPI1_IS_CLK_DISABLED()       (READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_HSPI1EN) == 0…
2285 #define __HAL_RCC_SRAM6_IS_CLK_DISABLED()       (READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_SRAM6EN) == 0…
2289 #define __HAL_RCC_SRAM5_IS_CLK_DISABLED()       (READ_BIT(RCC->AHB2ENR2, RCC_AHB2ENR2_SRAM5EN) == 0…