594   uint32_t tmpcr2;  in LL_TIM_HALLSENSOR_Init()  local
609   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in LL_TIM_HALLSENSOR_Init()
621   tmpcr2 |= TIM_CR2_TI1S;  in LL_TIM_HALLSENSOR_Init()
624   tmpcr2 |= LL_TIM_TRGO_OC2REF;  in LL_TIM_HALLSENSOR_Init()
647   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in LL_TIM_HALLSENSOR_Init()
778   uint32_t tmpcr2;  in OC1Config()  local
793   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC1Config()
824     MODIFY_REG(tmpcr2, TIM_CR2_OIS1, TIM_OCInitStruct->OCIdleState);  in OC1Config()
827     MODIFY_REG(tmpcr2, TIM_CR2_OIS1N, TIM_OCInitStruct->OCNIdleState << 1U);  in OC1Config()
831   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC1Config()
857   uint32_t tmpcr2;  in OC2Config()  local
872   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC2Config()
903     MODIFY_REG(tmpcr2, TIM_CR2_OIS2, TIM_OCInitStruct->OCIdleState << 2U);  in OC2Config()
906     MODIFY_REG(tmpcr2, TIM_CR2_OIS2N, TIM_OCInitStruct->OCNIdleState << 3U);  in OC2Config()
910   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC2Config()
936   uint32_t tmpcr2;  in OC3Config()  local
951   tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);  in OC3Config()
982     MODIFY_REG(tmpcr2, TIM_CR2_OIS3, TIM_OCInitStruct->OCIdleState << 4U);  in OC3Config()
985     MODIFY_REG(tmpcr2, TIM_CR2_OIS3N, TIM_OCInitStruct->OCNIdleState << 5U);  in OC3Config()
989   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC3Config()
1015   uint32_t tmpcr2;  in OC4Config()  local
1030   tmpcr2 =  LL_TIM_ReadReg(TIMx, CR2);  in OC4Config()
1052     MODIFY_REG(tmpcr2, TIM_CR2_OIS4, TIM_OCInitStruct->OCIdleState << 6U);  in OC4Config()
1056   LL_TIM_WriteReg(TIMx, CR2, tmpcr2);  in OC4Config()