Lines Matching full:with
14 * If no LICENSE file comes with this software, it is provided AS-IS.
71 … compatibility with some ADC on other STM32 series
75 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
83 /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
104 ADC_CHANNEL_ID_NUMBER_MASK with reduced range: on this STM32 series, ADC group regular sequencer,
105 if set to mode "fully configurable", can contain channels with a restricted channel number.
254 … | ADC_CR_ADSTART | ADC_CR_ADSTP) /* ADC register CR bits with
265 with which VrefInt has been calibrated in production
281 … with which temperature sensor has been calibrated in production
346 * (setting possible with ADC enabled without conversion on going,
347 * ADC enabled with conversion on going, ...)
348 * Each feature can be updated afterwards with a unitary function
349 * and potentially with ADC in a different state than disabled,
358 … ADC clock synchronous (from PCLK) with prescaler 1 must be enabled
388 * (functions with prefix "REG").
395 * (setting possible with ADC enabled without conversion on going,
396 * ADC enabled with conversion on going, ...)
397 * Each feature can be updated afterwards with a unitary function
398 * and potentially with ADC in a different state than disabled,
409 … with some ADC on other STM32 series having this setting set by HW
469 * @brief Flags defines which can be used with LL_ADC_ReadReg function
489 * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
509 /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
512 /* List of ADC registers intended to be used (most commonly) with */
516 … (corresponding to register DR) to be used with ADC configured in independent
529 …DC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
533 …DC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
537 …DC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
541 …DC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2) /*!< ADC asynchronous clock with
545 …DC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
549 …DC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
554 … | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
558 …DC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /*!< ADC asynchronous clock with
562 …DC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
566 …DC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC asynchronous clock with
571 … | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with
641 … See description with function @ref LL_ADC_SetLowPowerMode(). */
644 … when a new ADC conversion is triggered (with startup time between trigger
645 and start of sampling). See description with function
648 and auto power-off combined. See description with function @ref LL_ADC_SetLowPowerMode(). */
814 … This ADC mode is intended to be used with DMA mode non-circular. */
818 … This ADC mode is intended to be used with DMA mode circular. */
854 with 2 ranks in the sequence */
856 with 3 ranks in the sequence */
858 with 4 ranks in the sequence */
860 with 5 ranks in the sequence */
862 with 6 ranks in the sequence */
864 with 7 ranks in the sequence */
866 with 8 ranks in the sequence */
878 … (scan of all ranks, ADC conversion of ranks with channels enabled in
885 … (scan of all ranks, ADC conversion of ranks with channels enabled in
897 … discontinuous mode enable with sequence interruption every rank */
1057 … with other STM32 devices featuring ADC group injected, in this case other
1263 * number is returned, either defined with number
1264 * or with bitfield (only one bit must be set).
1384 * number in ADC registers. The differentiation is made only with
1492 * number in ADC registers. The differentiation is made only with
1511 * define a single channel to monitor with analog watchdog
1513 * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1580 * @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
1582 * Example, with a ADC resolution of 8 bits, to set the value of
1603 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1604 * Example, with a ADC resolution of 8 bits, to get the value of
1624 * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1642 * - Multimode (for devices with several ADC instances)
1653 * @note This check is required by functions with setting conditioned to
1657 * @note On devices with only 1 ADC common instance, parameter of this macro
1659 * with devices featuring several ADC common instances).
1743 * On devices with small package, the pin Vref+ is not present
1777 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1840 * with TS_ADC_DATA = temperature sensor raw data measured by ADC
1847 * of the current device has characteristics in line with
1921 * intended to be used (most commonly) with DMA transfer.
1925 * @note This macro is intended to be used with LL DMA driver, refer to
1933 * @note For devices with several ADC: in multimode, some devices
1966 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2049 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2091 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2121 * This check can be done with function @ref LL_ADC_IsEnabled() for each
2225 * or differential (for devices with differential mode available).
2247 * or differential (for devices with differential mode available).
2347 * - It is not recommended to use with interruption or DMA
2353 * - Do use with polling: 1. Start conversion,
2362 * (with startup time between trigger and start of sampling).
2363 * This feature can be combined with low power mode "auto wait".
2364 * @note With ADC low power mode "auto wait", the ADC conversion data read
2404 * - It is not recommended to use with interruption or DMA
2410 * - Do use with polling: 1. Start conversion,
2419 * (with startup time between trigger and start of sampling).
2420 * This feature can be combined with low power mode "auto wait".
2421 * @note With ADC low power mode "auto wait", the ADC conversion data read
2451 * @note Usage of ADC trigger frequency mode with ADC low power mode:
2581 * (default setting for compatibility with some ADC on other
2647 /* to match with triggers literals definition. */ in LL_ADC_REG_GetTriggerSource()
2770 * - For devices with sequencer fully configurable
2780 * - For devices with sequencer not fully configurable
2842 * - For devices with sequencer fully configurable
2852 * - For devices with sequencer not fully configurable
3076 /* Set bits with content of parameter "Channel" with bits position */ in LL_ADC_REG_SetSequencerRanks()
3078 /* Parameters "Rank" and "Channel" are used with masks because containing */ in LL_ADC_REG_SetSequencerRanks()
3099 * with parts of literals LL_ADC_CHANNEL_x or using
3104 * process the returned value with the helper macro
3172 * This function can be used with setting "not fully configurable".
3244 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChannels()
3262 * This function can be used with setting "not fully configurable".
3334 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChAdd()
3352 * This function can be used with setting "not fully configurable".
3424 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_REG_SetSequencerChRem()
3440 * This function can be used with setting "not fully configurable".
3576 * This ADC mode is intended to be used with DMA mode non-circular.
3580 * This ADC mode is intended to be used with DMA mode circular.
3613 * This ADC mode is intended to be used with DMA mode non-circular.
3617 * This ADC mode is intended to be used with DMA mode circular.
3641 * @note Compatibility with devices without feature overrun:
3645 * Therefore, for compatibility with all devices, parameter
3759 /* Parameter "Channel" is used with masks because containing */ in LL_ADC_SetChannelSamplingTime()
3855 * with analog watchdog from sequencer channel definition,
3921 /* Set bits with content of parameter "AWDChannelGroup" with bits position */ in LL_ADC_SetAnalogWDMonitChannels()
3923 /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */ in LL_ADC_SetAnalogWDMonitChannels()
3948 * with parts of literals LL_ADC_CHANNEL_x or using
3953 * process the returned value with the helper macro
4143 /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */ in LL_ADC_ConfigAnalogWDThresholds()
4146 /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */ in LL_ADC_ConfigAnalogWDThresholds()
4204 * ADC can be disabled, enabled with or without conversion on going
4226 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_SetAnalogWDThresholds()
4229 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_SetAnalogWDThresholds()
4244 * threshold low or raw data with ADC thresholds high and low
4246 * @note If raw data with ADC thresholds high and low is retrieved,
4273 /* Set bits with content of parameter "AWDThresholdValue" with bits */ in LL_ADC_GetAnalogWDThresholds()
4276 /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ in LL_ADC_GetAnalogWDThresholds()
4478 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_EnableInternalRegulator()
4480 /* to not interfere with bits with HW property "rs". */ in LL_ADC_EnableInternalRegulator()
4529 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Enable()
4531 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Enable()
4549 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_Disable()
4551 /* to not interfere with bits with HW property "rs". */ in LL_ADC_Disable()
4584 * or differential (for devices with differential mode available).
4588 * @note In case of usage of ADC with DMA transfer:
4612 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_StartCalibration()
4614 /* to not interfere with bits with HW property "rs". */ in LL_ADC_StartCalibration()
4659 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StartConversion()
4661 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StartConversion()
4671 * ADC must be enabled (potentially with conversion on going on group regular),
4679 /* Note: Write register with some additional bits forced to state reset */ in LL_ADC_REG_StopConversion()
4681 /* to not interfere with bits with HW property "rs". */ in LL_ADC_REG_StopConversion()
4713 * with feature oversampling).
4726 * @note For devices with feature oversampling: Oversampling
4741 * @note For devices with feature oversampling: Oversampling
4756 * @note For devices with feature oversampling: Oversampling
4771 * @note For devices with feature oversampling: Oversampling