Lines Matching refs:APBENR2

1147                                                     SET_BIT(RCC->APBENR2, RCC_APBENR2_SYSCFGEN); \
1149 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_SYSCFGEN); \
1159 SET_BIT(RCC->APBENR2, RCC_APBENR2_TIM1EN); \
1161 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM1EN); \
1167 SET_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN); \
1169 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN); \
1175 SET_BIT(RCC->APBENR2, RCC_APBENR2_USART1EN); \
1177 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_USART1EN); \
1183 SET_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN); \
1185 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN); \
1191 SET_BIT(RCC->APBENR2, RCC_APBENR2_TIM16EN); \
1193 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM16EN); \
1199 SET_BIT(RCC->APBENR2, RCC_APBENR2_ADCEN); \
1201 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_ADCEN); \
1205 #define __HAL_RCC_SYSCFG_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_SYSCFGEN)
1211 #define __HAL_RCC_TIM1_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_TIM1EN)
1213 #define __HAL_RCC_SPI1_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN)
1215 #define __HAL_RCC_USART1_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_USART1EN)
1217 #define __HAL_RCC_TIM15_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN)
1219 #define __HAL_RCC_TIM16_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_TIM16EN)
1221 #define __HAL_RCC_ADC_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_ADCEN)
1416 #define __HAL_RCC_SYSCFG_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_SYSCFGEN) != 0U)
1422 #define __HAL_RCC_TIM1_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM1EN) != 0U)
1424 #define __HAL_RCC_SPI1_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN) != 0U)
1426 #define __HAL_RCC_USART1_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_USART1EN) != 0U)
1428 #define __HAL_RCC_TIM15_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN) != 0U)
1430 #define __HAL_RCC_TIM16_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM16EN) != 0U)
1432 #define __HAL_RCC_ADC_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_ADCEN) != 0U)
1438 #define __HAL_RCC_SYSCFG_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_SYSCFGEN) == 0U)
1440 #define __HAL_RCC_TIM1_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM1EN) == 0U)
1442 #define __HAL_RCC_SPI1_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN) == 0U)
1444 #define __HAL_RCC_USART1_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_USART1EN) == 0U)
1446 #define __HAL_RCC_TIM15_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM15EN) == 0U)
1448 #define __HAL_RCC_TIM16_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_TIM16EN) == 0U)
1450 #define __HAL_RCC_ADC_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_ADCEN) == 0U)