Lines Matching refs:pConfig
267 void HAL_RIF_RIMC_ConfigMasterAttributes(uint32_t MasterId, const RIMC_MasterConfig_t *pConfig) in HAL_RIF_RIMC_ConfigMasterAttributes() argument
273 assert_param(pConfig != (void *)NULL); in HAL_RIF_RIMC_ConfigMasterAttributes()
275 assert_param(IS_RIF_SINGLE_CID(pConfig->MasterCID)); in HAL_RIF_RIMC_ConfigMasterAttributes()
276 assert_param(IS_RIF_MASTER_CID(pConfig->MasterCID)); in HAL_RIF_RIMC_ConfigMasterAttributes()
277 assert_param(IS_RIF_SEC_PRIV_ATTRIBUTE(pConfig->SecPriv)); in HAL_RIF_RIMC_ConfigMasterAttributes()
279 master_cid = POSITION_VAL(pConfig->MasterCID); in HAL_RIF_RIMC_ConfigMasterAttributes()
282 …rimc_attr_val |= ((master_cid << RIFSC_RIMC_ATTRx_MCID_Pos) | (pConfig->SecPriv << RIFSC_RIMC_ATTR… in HAL_RIF_RIMC_ConfigMasterAttributes()
295 void HAL_RIF_RIMC_GetConfigMasterAttributes(uint32_t MasterId, RIMC_MasterConfig_t *pConfig) in HAL_RIF_RIMC_GetConfigMasterAttributes() argument
301 assert_param(pConfig != (void *)NULL); in HAL_RIF_RIMC_GetConfigMasterAttributes()
305 pConfig->SecPriv = ((rimc_attr_val & (RIFSC_RIMC_ATTRx_MPRIV | RIFSC_RIMC_ATTRx_MSEC)) in HAL_RIF_RIMC_GetConfigMasterAttributes()
308 pConfig->MasterCID = (1UL << master_cid); in HAL_RIF_RIMC_GetConfigMasterAttributes()
555 …F_ConfigBaseRegion(RISAF_TypeDef *RISAFx, uint32_t Region, const RISAF_BaseRegionConfig_t *pConfig) in HAL_RIF_RISAF_ConfigBaseRegion() argument
558 assert_param(pConfig != (void *)NULL); in HAL_RIF_RISAF_ConfigBaseRegion()
564 if (pConfig->Filtering == RISAF_FILTER_DISABLE) in HAL_RIF_RISAF_ConfigBaseRegion()
571 assert_param(IS_RISAF_FILTERING(pConfig->Filtering)); in HAL_RIF_RISAF_ConfigBaseRegion()
572 assert_param(IS_RIF_CID(pConfig->PrivWhitelist)); in HAL_RIF_RISAF_ConfigBaseRegion()
573 assert_param(IS_RIF_CID(pConfig->ReadWhitelist)); in HAL_RIF_RISAF_ConfigBaseRegion()
574 assert_param(IS_RIF_CID(pConfig->WriteWhitelist)); in HAL_RIF_RISAF_ConfigBaseRegion()
575 assert_param(IS_RIF_SEC_PRIV_ATTRIBUTE(pConfig->Secure)); in HAL_RIF_RISAF_ConfigBaseRegion()
576 assert_param(IS_RISAF_GRANULARITY(RISAFx, pConfig->StartAddress)); in HAL_RIF_RISAF_ConfigBaseRegion()
577 assert_param(IS_RISAF_LIMIT_ADDRESS_SPACE_SIZE(RISAFx, pConfig->StartAddress)); in HAL_RIF_RISAF_ConfigBaseRegion()
578 assert_param(IS_RISAF_GRANULARITY(RISAFx, (pConfig->EndAddress + 1U))); in HAL_RIF_RISAF_ConfigBaseRegion()
579 assert_param(IS_RISAF_LIMIT_ADDRESS_SPACE_SIZE(RISAFx, pConfig->EndAddress)); in HAL_RIF_RISAF_ConfigBaseRegion()
580 assert_param(pConfig->StartAddress < pConfig->EndAddress); in HAL_RIF_RISAF_ConfigBaseRegion()
583 RISAFx->REG[Region].STARTR = pConfig->StartAddress; in HAL_RIF_RISAF_ConfigBaseRegion()
584 RISAFx->REG[Region].ENDR = pConfig->EndAddress; in HAL_RIF_RISAF_ConfigBaseRegion()
587 …RISAFx->REG[Region].CIDCFGR = (pConfig->ReadWhitelist | (pConfig->WriteWhitelist << RISAF_REGx_CID… in HAL_RIF_RISAF_ConfigBaseRegion()
588 RISAFx->REG[Region].CFGR = (pConfig->Filtering | (pConfig->Secure << RISAF_REGx_CFGR_SEC_Pos) in HAL_RIF_RISAF_ConfigBaseRegion()
589 | (pConfig->PrivWhitelist << RISAF_REGx_CFGR_PRIVC0_Pos)); in HAL_RIF_RISAF_ConfigBaseRegion()
618 …etConfigBaseRegion(const RISAF_TypeDef *RISAFx, uint32_t Region, RISAF_BaseRegionConfig_t *pConfig) in HAL_RIF_RISAF_GetConfigBaseRegion() argument
627 assert_param(pConfig != (void *)NULL); in HAL_RIF_RISAF_GetConfigBaseRegion()
632 pConfig->Filtering = (cfgr_reg & RISAF_REGx_CFGR_BREN); in HAL_RIF_RISAF_GetConfigBaseRegion()
633 pConfig->Secure = ((cfgr_reg & RISAF_REGx_CFGR_SEC) >> RISAF_REGx_CFGR_SEC_Pos); in HAL_RIF_RISAF_GetConfigBaseRegion()
634 …pConfig->PrivWhitelist = ((cfgr_reg & (RIF_CID_MASK << RISAF_REGx_CFGR_PRIVC0_Pos)) >> RISAF_REGx_… in HAL_RIF_RISAF_GetConfigBaseRegion()
635 pConfig->ReadWhitelist = (cidcfgr_reg & RIF_CID_MASK); in HAL_RIF_RISAF_GetConfigBaseRegion()
636 …pConfig->WriteWhitelist = ((cidcfgr_reg & (RIF_CID_MASK << RISAF_REGx_CIDCFGR_WRENC0_Pos)) >> RISA… in HAL_RIF_RISAF_GetConfigBaseRegion()
637 pConfig->StartAddress = RISAFx->REG[Region].STARTR; in HAL_RIF_RISAF_GetConfigBaseRegion()
638 pConfig->EndAddress = RISAFx->REG[Region].ENDR; in HAL_RIF_RISAF_GetConfigBaseRegion()
672 const RISAF_DelegationConfig_t *pConfig) in HAL_RIF_RISAF_ConfigSubRegionDelegation() argument
678 assert_param(pConfig != (void *)NULL); in HAL_RIF_RISAF_ConfigSubRegionDelegation()
683 assert_param(IS_RISAF_DELEGATION(pConfig->Delegation)); in HAL_RIF_RISAF_ConfigSubRegionDelegation()
684 assert_param(IS_RIF_SINGLE_CID(pConfig->DelegatedCID)); in HAL_RIF_RISAF_ConfigSubRegionDelegation()
687 cid = POSITION_VAL(pConfig->DelegatedCID); in HAL_RIF_RISAF_ConfigSubRegionDelegation()
693 nestr_reg |= ((cid << RISAF_REGx_zNESTR_DCCID_Pos) | pConfig->Delegation); in HAL_RIF_RISAF_ConfigSubRegionDelegation()
700 nestr_reg |= ((cid << RISAF_REGx_zNESTR_DCCID_Pos) | pConfig->Delegation); in HAL_RIF_RISAF_ConfigSubRegionDelegation()
735 RISAF_DelegationConfig_t *pConfig) in HAL_RIF_RISAF_GetConfigSubRegionDelegation() argument
740 assert_param(pConfig != (void *)NULL); in HAL_RIF_RISAF_GetConfigSubRegionDelegation()
748 pConfig->Delegation = (RISAFx->REG[Region].ANESTR & RISAF_REGx_zNESTR_DCEN); in HAL_RIF_RISAF_GetConfigSubRegionDelegation()
753 pConfig->Delegation = (RISAFx->REG[Region].BNESTR & RISAF_REGx_zNESTR_DCEN); in HAL_RIF_RISAF_GetConfigSubRegionDelegation()
757 pConfig->DelegatedCID = (1UL << cid); in HAL_RIF_RISAF_GetConfigSubRegionDelegation()
792 const RISAF_SubRegionConfig_t *pConfig) in HAL_RIF_RISAF_ConfigSubRegion() argument
797 assert_param(pConfig != (void *)NULL); in HAL_RIF_RISAF_ConfigSubRegion()
802 assert_param(IS_RISAF_FILTERING(pConfig->Filtering)); in HAL_RIF_RISAF_ConfigSubRegion()
803 assert_param(IS_RIF_LOCK_STATE(pConfig->Lock)); in HAL_RIF_RISAF_ConfigSubRegion()
806 cid = POSITION_VAL(pConfig->CID); in HAL_RIF_RISAF_ConfigSubRegion()
810 if (pConfig->Filtering == RISAF_FILTER_DISABLE) in HAL_RIF_RISAF_ConfigSubRegion()
813 RISAFx->REG[Region].ACFGR |= (pConfig->Lock << RISAF_REGx_zCFGR_RLOCK_Pos); in HAL_RIF_RISAF_ConfigSubRegion()
818 assert_param(IS_RISAF_READ_WRITE(pConfig->ReadWrite)); in HAL_RIF_RISAF_ConfigSubRegion()
819 assert_param(IS_RIF_SEC_PRIV_ATTRIBUTE(pConfig->SecPriv)); in HAL_RIF_RISAF_ConfigSubRegion()
820 assert_param(IS_RISAF_GRANULARITY(RISAFx, pConfig->StartAddress)); in HAL_RIF_RISAF_ConfigSubRegion()
821 assert_param(IS_RISAF_LIMIT_ADDRESS_SPACE_SIZE(RISAFx, pConfig->StartAddress)); in HAL_RIF_RISAF_ConfigSubRegion()
822 assert_param(IS_RISAF_GRANULARITY(RISAFx, (pConfig->EndAddress + 1U))); in HAL_RIF_RISAF_ConfigSubRegion()
823 assert_param(IS_RISAF_LIMIT_ADDRESS_SPACE_SIZE(RISAFx, pConfig->EndAddress)); in HAL_RIF_RISAF_ConfigSubRegion()
824 assert_param(pConfig->StartAddress < pConfig->EndAddress); in HAL_RIF_RISAF_ConfigSubRegion()
826 RISAFx->REG[Region].ASTARTR = pConfig->StartAddress; in HAL_RIF_RISAF_ConfigSubRegion()
827 RISAFx->REG[Region].AENDR = pConfig->EndAddress; in HAL_RIF_RISAF_ConfigSubRegion()
828 … RISAFx->REG[Region].ACFGR = (pConfig->Filtering | (pConfig->Lock << RISAF_REGx_zCFGR_RLOCK_Pos) in HAL_RIF_RISAF_ConfigSubRegion()
829 … | (cid << RISAF_REGx_zCFGR_SRCID_Pos) | (pConfig->SecPriv << RISAF_REGx_zCFGR_SEC_Pos) in HAL_RIF_RISAF_ConfigSubRegion()
830 | (pConfig->ReadWrite)); in HAL_RIF_RISAF_ConfigSubRegion()
835 if (pConfig->Filtering == RISAF_FILTER_DISABLE) in HAL_RIF_RISAF_ConfigSubRegion()
838 RISAFx->REG[Region].BCFGR |= (pConfig->Lock << RISAF_REGx_zCFGR_RLOCK_Pos); in HAL_RIF_RISAF_ConfigSubRegion()
843 assert_param(IS_RISAF_READ_WRITE(pConfig->ReadWrite)); in HAL_RIF_RISAF_ConfigSubRegion()
844 assert_param(IS_RIF_SEC_PRIV_ATTRIBUTE(pConfig->SecPriv)); in HAL_RIF_RISAF_ConfigSubRegion()
845 assert_param(IS_RISAF_GRANULARITY(RISAFx, pConfig->StartAddress)); in HAL_RIF_RISAF_ConfigSubRegion()
846 assert_param(IS_RISAF_LIMIT_ADDRESS_SPACE_SIZE(RISAFx, pConfig->StartAddress)); in HAL_RIF_RISAF_ConfigSubRegion()
847 assert_param(IS_RISAF_GRANULARITY(RISAFx, (pConfig->EndAddress + 1U))); in HAL_RIF_RISAF_ConfigSubRegion()
848 assert_param(IS_RISAF_LIMIT_ADDRESS_SPACE_SIZE(RISAFx, pConfig->EndAddress)); in HAL_RIF_RISAF_ConfigSubRegion()
849 assert_param(pConfig->StartAddress < pConfig->EndAddress); in HAL_RIF_RISAF_ConfigSubRegion()
851 RISAFx->REG[Region].BSTARTR = pConfig->StartAddress; in HAL_RIF_RISAF_ConfigSubRegion()
852 RISAFx->REG[Region].BENDR = pConfig->EndAddress; in HAL_RIF_RISAF_ConfigSubRegion()
853 … RISAFx->REG[Region].BCFGR = (pConfig->Filtering | (pConfig->Lock << RISAF_REGx_zCFGR_RLOCK_Pos) in HAL_RIF_RISAF_ConfigSubRegion()
854 … | (cid << RISAF_REGx_zCFGR_SRCID_Pos) | (pConfig->SecPriv << RISAF_REGx_zCFGR_SEC_Pos) in HAL_RIF_RISAF_ConfigSubRegion()
855 | (pConfig->ReadWrite)); in HAL_RIF_RISAF_ConfigSubRegion()
889 RISAF_SubRegionConfig_t *pConfig) in HAL_RIF_RISAF_GetConfigSubRegion() argument
895 assert_param(pConfig != (void *)NULL); in HAL_RIF_RISAF_GetConfigSubRegion()
904 pConfig->StartAddress = RISAFx->REG[Region].ASTARTR; in HAL_RIF_RISAF_GetConfigSubRegion()
905 pConfig->EndAddress = RISAFx->REG[Region].AENDR; in HAL_RIF_RISAF_GetConfigSubRegion()
910 pConfig->StartAddress = RISAFx->REG[Region].BSTARTR; in HAL_RIF_RISAF_GetConfigSubRegion()
911 pConfig->EndAddress = RISAFx->REG[Region].BENDR; in HAL_RIF_RISAF_GetConfigSubRegion()
914 pConfig->Filtering = (cfgr_reg & RISAF_REGx_zCFGR_SREN); in HAL_RIF_RISAF_GetConfigSubRegion()
916 pConfig->CID = (1UL << cid); in HAL_RIF_RISAF_GetConfigSubRegion()
917 …pConfig->SecPriv = ((cfgr_reg & (RISAF_REGx_zCFGR_PRIV | RISAF_REGx_zCFGR_SEC)) >> RISAF_REGx_zCFG… in HAL_RIF_RISAF_GetConfigSubRegion()
918 pConfig->ReadWrite = (cfgr_reg & (RISAF_REGx_zCFGR_WREN | RISAF_REGx_zCFGR_RDEN)); in HAL_RIF_RISAF_GetConfigSubRegion()
919 pConfig->Lock = ((cfgr_reg & RISAF_REGx_zCFGR_RLOCK) >> RISAF_REGx_zCFGR_RLOCK_Pos); in HAL_RIF_RISAF_GetConfigSubRegion()