Lines Matching refs:Region
555 void HAL_RIF_RISAF_ConfigBaseRegion(RISAF_TypeDef *RISAFx, uint32_t Region, const RISAF_BaseRegionC… in HAL_RIF_RISAF_ConfigBaseRegion() argument
560 assert_param(IS_RISAF_REGION(Region)); in HAL_RIF_RISAF_ConfigBaseRegion()
561 assert_param(IS_RISAF_MAX_REGION(RISAFx, Region)); in HAL_RIF_RISAF_ConfigBaseRegion()
566 RISAFx->REG[Region].CFGR &= (~(RISAF_FILTER_ENABLE)); in HAL_RIF_RISAF_ConfigBaseRegion()
583 RISAFx->REG[Region].STARTR = pConfig->StartAddress; in HAL_RIF_RISAF_ConfigBaseRegion()
584 RISAFx->REG[Region].ENDR = pConfig->EndAddress; in HAL_RIF_RISAF_ConfigBaseRegion()
587 …RISAFx->REG[Region].CIDCFGR = (pConfig->ReadWhitelist | (pConfig->WriteWhitelist << RISAF_REGx_CID… in HAL_RIF_RISAF_ConfigBaseRegion()
588 RISAFx->REG[Region].CFGR = (pConfig->Filtering | (pConfig->Secure << RISAF_REGx_CFGR_SEC_Pos) in HAL_RIF_RISAF_ConfigBaseRegion()
618 void HAL_RIF_RISAF_GetConfigBaseRegion(const RISAF_TypeDef *RISAFx, uint32_t Region, RISAF_BaseRegi… in HAL_RIF_RISAF_GetConfigBaseRegion() argument
625 assert_param(IS_RISAF_REGION(Region)); in HAL_RIF_RISAF_GetConfigBaseRegion()
626 assert_param(IS_RISAF_MAX_REGION(RISAFx, Region)); in HAL_RIF_RISAF_GetConfigBaseRegion()
629 cfgr_reg = RISAFx->REG[Region].CFGR; in HAL_RIF_RISAF_GetConfigBaseRegion()
630 cidcfgr_reg = RISAFx->REG[Region].CIDCFGR; in HAL_RIF_RISAF_GetConfigBaseRegion()
637 pConfig->StartAddress = RISAFx->REG[Region].STARTR; in HAL_RIF_RISAF_GetConfigBaseRegion()
638 pConfig->EndAddress = RISAFx->REG[Region].ENDR; in HAL_RIF_RISAF_GetConfigBaseRegion()
671 void HAL_RIF_RISAF_ConfigSubRegionDelegation(RISAF_TypeDef *RISAFx, uint32_t Region, uint32_t SubRe… in HAL_RIF_RISAF_ConfigSubRegionDelegation() argument
680 assert_param(IS_RISAF_REGION(Region)); in HAL_RIF_RISAF_ConfigSubRegionDelegation()
681 assert_param(IS_RISAF_MAX_REGION(RISAFx, Region)); in HAL_RIF_RISAF_ConfigSubRegionDelegation()
691 nestr_reg = RISAFx->REG[Region].ANESTR; in HAL_RIF_RISAF_ConfigSubRegionDelegation()
694 RISAFx->REG[Region].ANESTR = nestr_reg; in HAL_RIF_RISAF_ConfigSubRegionDelegation()
698 nestr_reg = RISAFx->REG[Region].BNESTR; in HAL_RIF_RISAF_ConfigSubRegionDelegation()
701 RISAFx->REG[Region].BNESTR = nestr_reg; in HAL_RIF_RISAF_ConfigSubRegionDelegation()
734 void HAL_RIF_RISAF_GetConfigSubRegionDelegation(const RISAF_TypeDef *RISAFx, uint32_t Region, uint3… in HAL_RIF_RISAF_GetConfigSubRegionDelegation() argument
742 assert_param(IS_RISAF_REGION(Region)); in HAL_RIF_RISAF_GetConfigSubRegionDelegation()
743 assert_param(IS_RISAF_MAX_REGION(RISAFx, Region)); in HAL_RIF_RISAF_GetConfigSubRegionDelegation()
748 pConfig->Delegation = (RISAFx->REG[Region].ANESTR & RISAF_REGx_zNESTR_DCEN); in HAL_RIF_RISAF_GetConfigSubRegionDelegation()
749 cid = ((RISAFx->REG[Region].ANESTR & RISAF_REGx_zNESTR_DCCID) >> RISAF_REGx_zNESTR_DCCID_Pos); in HAL_RIF_RISAF_GetConfigSubRegionDelegation()
753 pConfig->Delegation = (RISAFx->REG[Region].BNESTR & RISAF_REGx_zNESTR_DCEN); in HAL_RIF_RISAF_GetConfigSubRegionDelegation()
754 cid = ((RISAFx->REG[Region].BNESTR & RISAF_REGx_zNESTR_DCCID) >> RISAF_REGx_zNESTR_DCCID_Pos); in HAL_RIF_RISAF_GetConfigSubRegionDelegation()
791 void HAL_RIF_RISAF_ConfigSubRegion(RISAF_TypeDef *RISAFx, uint32_t Region, uint32_t SubRegion, in HAL_RIF_RISAF_ConfigSubRegion() argument
799 assert_param(IS_RISAF_REGION(Region)); in HAL_RIF_RISAF_ConfigSubRegion()
800 assert_param(IS_RISAF_MAX_REGION(RISAFx, Region)); in HAL_RIF_RISAF_ConfigSubRegion()
812 RISAFx->REG[Region].ACFGR &= (~(RISAF_FILTER_ENABLE | RISAF_REGx_zCFGR_RLOCK)); in HAL_RIF_RISAF_ConfigSubRegion()
813 RISAFx->REG[Region].ACFGR |= (pConfig->Lock << RISAF_REGx_zCFGR_RLOCK_Pos); in HAL_RIF_RISAF_ConfigSubRegion()
826 RISAFx->REG[Region].ASTARTR = pConfig->StartAddress; in HAL_RIF_RISAF_ConfigSubRegion()
827 RISAFx->REG[Region].AENDR = pConfig->EndAddress; in HAL_RIF_RISAF_ConfigSubRegion()
828 … RISAFx->REG[Region].ACFGR = (pConfig->Filtering | (pConfig->Lock << RISAF_REGx_zCFGR_RLOCK_Pos) in HAL_RIF_RISAF_ConfigSubRegion()
837 RISAFx->REG[Region].BCFGR &= (~(RISAF_FILTER_ENABLE | RISAF_REGx_zCFGR_RLOCK)); in HAL_RIF_RISAF_ConfigSubRegion()
838 RISAFx->REG[Region].BCFGR |= (pConfig->Lock << RISAF_REGx_zCFGR_RLOCK_Pos); in HAL_RIF_RISAF_ConfigSubRegion()
851 RISAFx->REG[Region].BSTARTR = pConfig->StartAddress; in HAL_RIF_RISAF_ConfigSubRegion()
852 RISAFx->REG[Region].BENDR = pConfig->EndAddress; in HAL_RIF_RISAF_ConfigSubRegion()
853 … RISAFx->REG[Region].BCFGR = (pConfig->Filtering | (pConfig->Lock << RISAF_REGx_zCFGR_RLOCK_Pos) in HAL_RIF_RISAF_ConfigSubRegion()
888 void HAL_RIF_RISAF_GetConfigSubRegion(const RISAF_TypeDef *RISAFx, uint32_t Region, uint32_t SubReg… in HAL_RIF_RISAF_GetConfigSubRegion() argument
897 assert_param(IS_RISAF_REGION(Region)); in HAL_RIF_RISAF_GetConfigSubRegion()
898 assert_param(IS_RISAF_MAX_REGION(RISAFx, Region)); in HAL_RIF_RISAF_GetConfigSubRegion()
903 cfgr_reg = RISAFx->REG[Region].ACFGR; in HAL_RIF_RISAF_GetConfigSubRegion()
904 pConfig->StartAddress = RISAFx->REG[Region].ASTARTR; in HAL_RIF_RISAF_GetConfigSubRegion()
905 pConfig->EndAddress = RISAFx->REG[Region].AENDR; in HAL_RIF_RISAF_GetConfigSubRegion()
909 cfgr_reg = RISAFx->REG[Region].BCFGR; in HAL_RIF_RISAF_GetConfigSubRegion()
910 pConfig->StartAddress = RISAFx->REG[Region].BSTARTR; in HAL_RIF_RISAF_GetConfigSubRegion()
911 pConfig->EndAddress = RISAFx->REG[Region].BENDR; in HAL_RIF_RISAF_GetConfigSubRegion()