190   RIFSC->RIMC_CR |= RIFSC_RIMC_CR_GLOCK;  in HAL_RIF_RIMC_Lock()
203   lock_status = (RIFSC->RIMC_CR & RIF_LOCK_ENABLE);  in HAL_RIF_RIMC_GetLock()
235   rimc_cr_reg = RIFSC->RIMC_CR;  in HAL_RIF_RIMC_SetDebugAccessPortCID()
238   RIFSC->RIMC_CR = rimc_cr_reg;  in HAL_RIF_RIMC_SetDebugAccessPortCID()
251   dap_cid = (RIFSC->RIMC_CR & RIFSC_RIMC_CR_DAPCID) >> RIFSC_RIMC_CR_DAPCID_Pos;  in HAL_RIF_RIMC_GetDebugAccessPortCID()
280   rimc_attr_val = RIFSC->RIMC_ATTRx[MasterId];  in HAL_RIF_RIMC_ConfigMasterAttributes()
283   RIFSC->RIMC_ATTRx[MasterId] = rimc_attr_val;  in HAL_RIF_RIMC_ConfigMasterAttributes()
304   rimc_attr_val = RIFSC->RIMC_ATTRx[MasterId];  in HAL_RIF_RIMC_GetConfigMasterAttributes()
339   RIFSC->RISC_CR |= RIFSC_RISC_CR_GLOCK;  in HAL_RIF_RISC_Lock()
352   lock_status = (RIFSC->RISC_CR & RIF_LOCK_ENABLE);  in HAL_RIF_RISC_GetLock()
372   sec_reg_val = RIFSC->RISC_SECCFGRx[PeriphId >> RIF_PERIPH_REG_SHIFT];  in HAL_RIF_RISC_SetSlaveSecureAttributes()
375   RIFSC->RISC_SECCFGRx[PeriphId >> RIF_PERIPH_REG_SHIFT] = sec_reg_val;  in HAL_RIF_RISC_SetSlaveSecureAttributes()
377   sec_reg_val = RIFSC->RISC_PRIVCFGRx[PeriphId >> RIF_PERIPH_REG_SHIFT];  in HAL_RIF_RISC_SetSlaveSecureAttributes()
380   RIFSC->RISC_PRIVCFGRx[PeriphId >> RIF_PERIPH_REG_SHIFT] = sec_reg_val;  in HAL_RIF_RISC_SetSlaveSecureAttributes()
396   p_sec_reg = &(RIFSC->RISC_SECCFGRx[PeriphId >> RIF_PERIPH_REG_SHIFT]);  in HAL_RIF_RISC_GetSlaveSecureAttributes()
399   p_sec_reg = &(RIFSC->RISC_PRIVCFGRx[PeriphId >> RIF_PERIPH_REG_SHIFT]);  in HAL_RIF_RISC_GetSlaveSecureAttributes()
420   p_lock_reg = &(RIFSC->RISC_RCFGLOCKRx[PeriphId >> RIF_PERIPH_REG_SHIFT]);  in HAL_RIF_RISC_SlaveConfigLock()
438   p_lock_reg = &(RIFSC->RISC_RCFGLOCKRx[PeriphId >> RIF_PERIPH_REG_SHIFT]);  in HAL_RIF_RISC_GetSlaveConfigLock()