Lines Matching refs:PLL4
812 assert_param(IS_RCC_PLL(pRCC_OscInitStruct->PLL4.PLLState)); in HAL_RCC_OscConfig()
814 if (pRCC_OscInitStruct->PLL4.PLLState != RCC_PLL_NONE) in HAL_RCC_OscConfig()
816 uint32_t new_pll_config = RCC_PLL_IsNewConfig(RCC_PLL4_CONFIG, &(pRCC_OscInitStruct->PLL4)); in HAL_RCC_OscConfig()
838 if (RCC_PLL_Config(RCC_PLL4_CONFIG, &(pRCC_OscInitStruct->PLL4)) != HAL_OK) in HAL_RCC_OscConfig()
843 else if ((pRCC_OscInitStruct->PLL4.PLLState == RCC_PLL_ON) && (pll4_ready == 0U)) in HAL_RCC_OscConfig()
1747 pRCC_OscInitStruct->PLL4.PLLState = RCC_PLL_ON; in HAL_RCC_GetOscConfig()
1748 pRCC_OscInitStruct->PLL4.PLLSource = (cfgr_value & RCC_PLL4CFGR1_PLL4SEL); in HAL_RCC_GetOscConfig()
1749 …pRCC_OscInitStruct->PLL4.PLLM = ((cfgr_value & RCC_PLL4CFGR1_PLL4DIVM) >> RCC_PLL4CFGR1_PLL4DIVM_P… in HAL_RCC_GetOscConfig()
1750 …pRCC_OscInitStruct->PLL4.PLLN = ((cfgr_value & RCC_PLL4CFGR1_PLL4DIVN) >> RCC_PLL4CFGR1_PLL4DIVN_P… in HAL_RCC_GetOscConfig()
1751 …pRCC_OscInitStruct->PLL4.PLLFractional = (READ_BIT(RCC->PLL4CFGR2, RCC_PLL4CFGR2_PLL4DIVNFRAC) >> \ in HAL_RCC_GetOscConfig()
1754 …pRCC_OscInitStruct->PLL4.PLLP1 = ((cfgr_value & RCC_PLL4CFGR3_PLL4PDIV1) >> RCC_PLL4CFGR3_PLL4PDIV… in HAL_RCC_GetOscConfig()
1755 …pRCC_OscInitStruct->PLL4.PLLP2 = ((cfgr_value & RCC_PLL4CFGR3_PLL4PDIV2) >> RCC_PLL4CFGR3_PLL4PDIV… in HAL_RCC_GetOscConfig()
1762 pRCC_OscInitStruct->PLL4.PLLState = RCC_PLL_BYPASS; in HAL_RCC_GetOscConfig()
1766 pRCC_OscInitStruct->PLL4.PLLState = RCC_PLL_OFF; in HAL_RCC_GetOscConfig()