Lines Matching refs:PLL1
675 assert_param(IS_RCC_PLL(pRCC_OscInitStruct->PLL1.PLLState)); in HAL_RCC_OscConfig()
677 if (pRCC_OscInitStruct->PLL1.PLLState != RCC_PLL_NONE) in HAL_RCC_OscConfig()
679 uint32_t new_pll_config = RCC_PLL_IsNewConfig(RCC_PLL1_CONFIG, &(pRCC_OscInitStruct->PLL1)); in HAL_RCC_OscConfig()
701 if (RCC_PLL_Config(RCC_PLL1_CONFIG, &(pRCC_OscInitStruct->PLL1)) != HAL_OK) in HAL_RCC_OscConfig()
706 else if ((pRCC_OscInitStruct->PLL1.PLLState == RCC_PLL_ON) && (pll1_ready == 0U)) in HAL_RCC_OscConfig()
1666 pRCC_OscInitStruct->PLL1.PLLState = RCC_PLL_ON; in HAL_RCC_GetOscConfig()
1667 pRCC_OscInitStruct->PLL1.PLLSource = (cfgr_value & RCC_PLL1CFGR1_PLL1SEL); in HAL_RCC_GetOscConfig()
1668 …pRCC_OscInitStruct->PLL1.PLLM = ((cfgr_value & RCC_PLL1CFGR1_PLL1DIVM) >> RCC_PLL1CFGR1_PLL1DIVM_P… in HAL_RCC_GetOscConfig()
1669 …pRCC_OscInitStruct->PLL1.PLLN = ((cfgr_value & RCC_PLL1CFGR1_PLL1DIVN) >> RCC_PLL1CFGR1_PLL1DIVN_P… in HAL_RCC_GetOscConfig()
1670 …pRCC_OscInitStruct->PLL1.PLLFractional = (READ_BIT(RCC->PLL1CFGR2, RCC_PLL1CFGR2_PLL1DIVNFRAC) >> \ in HAL_RCC_GetOscConfig()
1673 …pRCC_OscInitStruct->PLL1.PLLP1 = ((cfgr_value & RCC_PLL1CFGR3_PLL1PDIV1) >> RCC_PLL1CFGR3_PLL1PDIV… in HAL_RCC_GetOscConfig()
1674 …pRCC_OscInitStruct->PLL1.PLLP2 = ((cfgr_value & RCC_PLL1CFGR3_PLL1PDIV2) >> RCC_PLL1CFGR3_PLL1PDIV… in HAL_RCC_GetOscConfig()
1681 pRCC_OscInitStruct->PLL1.PLLState = RCC_PLL_BYPASS; in HAL_RCC_GetOscConfig()
1685 pRCC_OscInitStruct->PLL1.PLLState = RCC_PLL_OFF; in HAL_RCC_GetOscConfig()