Lines Matching refs:CFG1
1491 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN)) in HAL_I2S_Transmit_DMA()
1494 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in HAL_I2S_Transmit_DMA()
1625 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN)) in HAL_I2S_Receive_DMA()
1628 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in HAL_I2S_Receive_DMA()
1691 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN | SPI_CFG1_RXDMAEN); in HAL_I2SEx_TransmitReceive_DMA()
1758 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN)) in HAL_I2SEx_TransmitReceive_DMA()
1761 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in HAL_I2SEx_TransmitReceive_DMA()
1825 if (HAL_IS_BIT_CLR(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN)) in HAL_I2SEx_TransmitReceive_DMA()
1828 SET_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in HAL_I2SEx_TransmitReceive_DMA()
1968 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in HAL_I2S_DMAStop()
1969 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in HAL_I2S_DMAStop()
2256 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in I2S_DMATxCplt()
2303 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in I2S_DMARxCplt()
2348 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_TXDMAEN); in I2SEx_DMATxRxCplt()
2352 CLEAR_BIT(hi2s->Instance->CFG1, SPI_CFG1_RXDMAEN); in I2SEx_DMATxRxCplt()
2397 CLEAR_BIT(hi2s->Instance->CFG1, (SPI_CFG1_RXDMAEN | SPI_CFG1_TXDMAEN)); in I2S_DMAError()