Lines Matching refs:pTTParams
3499 … HAL_FDCAN_TT_ConfigOperation(FDCAN_HandleTypeDef *hfdcan, const FDCAN_TT_ConfigTypeDef *pTTParams) in HAL_FDCAN_TT_ConfigOperation() argument
3507 assert_param(IS_FDCAN_TT_TUR_NUMERATOR(pTTParams->TURNumerator)); in HAL_FDCAN_TT_ConfigOperation()
3508 assert_param(IS_FDCAN_TT_TUR_DENOMINATOR(pTTParams->TURDenominator)); in HAL_FDCAN_TT_ConfigOperation()
3509 assert_param(IS_FDCAN_TT_TIME_MASTER(pTTParams->TimeMaster)); in HAL_FDCAN_TT_ConfigOperation()
3510 assert_param(IS_FDCAN_MAX_VALUE(pTTParams->SyncDevLimit, 7U)); in HAL_FDCAN_TT_ConfigOperation()
3511 assert_param(IS_FDCAN_MAX_VALUE(pTTParams->InitRefTrigOffset, 127U)); in HAL_FDCAN_TT_ConfigOperation()
3512 assert_param(IS_FDCAN_MAX_VALUE(pTTParams->TriggerMemoryNbr, 64U)); in HAL_FDCAN_TT_ConfigOperation()
3513 assert_param(IS_FDCAN_TT_CYCLE_START_SYNC(pTTParams->CycleStartSync)); in HAL_FDCAN_TT_ConfigOperation()
3514 assert_param(IS_FDCAN_TT_STOP_WATCH_TRIGGER(pTTParams->StopWatchTrigSel)); in HAL_FDCAN_TT_ConfigOperation()
3515 assert_param(IS_FDCAN_TT_EVENT_TRIGGER(pTTParams->EventTrigSel)); in HAL_FDCAN_TT_ConfigOperation()
3516 if (pTTParams->TimeMaster == FDCAN_TT_POTENTIAL_MASTER) in HAL_FDCAN_TT_ConfigOperation()
3518 assert_param(IS_FDCAN_TT_BASIC_CYCLES_NUMBER(pTTParams->BasicCyclesNbr)); in HAL_FDCAN_TT_ConfigOperation()
3520 if (pTTParams->OperationMode != FDCAN_TT_COMMUNICATION_LEVEL0) in HAL_FDCAN_TT_ConfigOperation()
3522 assert_param(IS_FDCAN_TT_OPERATION(pTTParams->GapEnable)); in HAL_FDCAN_TT_ConfigOperation()
3523 assert_param(IS_FDCAN_MAX_VALUE(pTTParams->AppWdgLimit, 255U)); in HAL_FDCAN_TT_ConfigOperation()
3524 assert_param(IS_FDCAN_TT_EVENT_TRIGGER_POLARITY(pTTParams->EvtTrigPolarity)); in HAL_FDCAN_TT_ConfigOperation()
3525 assert_param(IS_FDCAN_TT_TX_ENABLE_WINDOW(pTTParams->TxEnableWindow)); in HAL_FDCAN_TT_ConfigOperation()
3526 assert_param(IS_FDCAN_MAX_VALUE(pTTParams->ExpTxTrigNbr, 4095U)); in HAL_FDCAN_TT_ConfigOperation()
3528 if (pTTParams->OperationMode != FDCAN_TT_COMMUNICATION_LEVEL1) in HAL_FDCAN_TT_ConfigOperation()
3530 assert_param(IS_FDCAN_TT_TUR_LEVEL_0_2(pTTParams->TURNumerator, pTTParams->TURDenominator)); in HAL_FDCAN_TT_ConfigOperation()
3531 assert_param(IS_FDCAN_TT_EXTERNAL_CLK_SYNC(pTTParams->ExternalClkSync)); in HAL_FDCAN_TT_ConfigOperation()
3532 assert_param(IS_FDCAN_TT_GLOBAL_TIME_FILTERING(pTTParams->GlobalTimeFilter)); in HAL_FDCAN_TT_ConfigOperation()
3533 assert_param(IS_FDCAN_TT_AUTO_CLK_CALIBRATION(pTTParams->ClockCalibration)); in HAL_FDCAN_TT_ConfigOperation()
3537 assert_param(IS_FDCAN_TT_TUR_LEVEL_1(pTTParams->TURNumerator, pTTParams->TURDenominator)); in HAL_FDCAN_TT_ConfigOperation()
3567 (((pTTParams->TURNumerator - 0x10000U) << FDCAN_TURCF_NCL_Pos) | in HAL_FDCAN_TT_ConfigOperation()
3568 (pTTParams->TURDenominator << FDCAN_TURCF_DC_Pos))); in HAL_FDCAN_TT_ConfigOperation()
3576 (pTTParams->OperationMode | \ in HAL_FDCAN_TT_ConfigOperation()
3577 pTTParams->TimeMaster | \ in HAL_FDCAN_TT_ConfigOperation()
3578 (pTTParams->SyncDevLimit << FDCAN_TTOCF_LDSDL_Pos) | \ in HAL_FDCAN_TT_ConfigOperation()
3579 (pTTParams->InitRefTrigOffset << FDCAN_TTOCF_IRTO_Pos))); in HAL_FDCAN_TT_ConfigOperation()
3580 if (pTTParams->OperationMode != FDCAN_TT_COMMUNICATION_LEVEL0) in HAL_FDCAN_TT_ConfigOperation()
3584 (pTTParams->GapEnable | \ in HAL_FDCAN_TT_ConfigOperation()
3585 (pTTParams->AppWdgLimit << FDCAN_TTOCF_AWL_Pos) | \ in HAL_FDCAN_TT_ConfigOperation()
3586 pTTParams->EvtTrigPolarity)); in HAL_FDCAN_TT_ConfigOperation()
3588 if (pTTParams->OperationMode != FDCAN_TT_COMMUNICATION_LEVEL1) in HAL_FDCAN_TT_ConfigOperation()
3592 (pTTParams->ExternalClkSync | \ in HAL_FDCAN_TT_ConfigOperation()
3593 pTTParams->GlobalTimeFilter | \ in HAL_FDCAN_TT_ConfigOperation()
3594 pTTParams->ClockCalibration)); in HAL_FDCAN_TT_ConfigOperation()
3598 MODIFY_REG(hfdcan->ttcan->TTMLM, FDCAN_TTMLM_CSS, pTTParams->CycleStartSync); in HAL_FDCAN_TT_ConfigOperation()
3599 if (pTTParams->OperationMode != FDCAN_TT_COMMUNICATION_LEVEL0) in HAL_FDCAN_TT_ConfigOperation()
3603 (((pTTParams->TxEnableWindow - 1U) << FDCAN_TTMLM_TXEW_Pos) | in HAL_FDCAN_TT_ConfigOperation()
3604 (pTTParams->ExpTxTrigNbr << FDCAN_TTMLM_ENTT_Pos))); in HAL_FDCAN_TT_ConfigOperation()
3606 if (pTTParams->TimeMaster == FDCAN_TT_POTENTIAL_MASTER) in HAL_FDCAN_TT_ConfigOperation()
3608 MODIFY_REG(hfdcan->ttcan->TTMLM, FDCAN_TTMLM_CCM, pTTParams->BasicCyclesNbr); in HAL_FDCAN_TT_ConfigOperation()
3614 (pTTParams->StopWatchTrigSel | pTTParams->EventTrigSel)); in HAL_FDCAN_TT_ConfigOperation()
3621 …MODIFY_REG(hfdcan->ttcan->TTTMC, FDCAN_TTTMC_TME, (pTTParams->TriggerMemoryNbr << FDCAN_TTTMC_TME_… in HAL_FDCAN_TT_ConfigOperation()
3625 hfdcan->msgRam.EndAddress = hfdcan->msgRam.TTMemorySA + (pTTParams->TriggerMemoryNbr * 2U * 4U); in HAL_FDCAN_TT_ConfigOperation()